MPC855TZQ80D4 Freescale Semiconductor, MPC855TZQ80D4 Datasheet - Page 10

IC MPU POWERQUICC 80MHZ 357PBGA

MPC855TZQ80D4

Manufacturer Part Number
MPC855TZQ80D4
Description
IC MPU POWERQUICC 80MHZ 357PBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICCr
Datasheets

Specifications of MPC855TZQ80D4

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
80MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Processor Series
MPC8xx
Core
MPC8xx
Data Bus Width
32 bit
Maximum Clock Frequency
80 MHz
Operating Supply Voltage
2.5 V, 3.3 V
Maximum Operating Temperature
+ 95 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
Core Size
32 Bit
Program Memory Size
8KB
Cpu Speed
80MHz
Digital Ic Case Style
BGA
No. Of Pins
357
Supply Voltage Range
3.135V To 3.465V
Rohs Compliant
No
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC855TZQ80D4
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
MPC855TZQ80D4
Manufacturer:
FREESCALE
Quantity:
20 000
Electrical Characteristics
Items on the same line have no ordering requirement with respect to one another. Items on separate lines
must be ordered sequentially such that voltage rails on a previous step must reach 90 percent of their value
before the voltage rails on the current step reach ten percent of theirs.
2.1.3
Table 2
Table 2
conditions is not guaranteed.
10
Core supply voltage
PLL supply voltage
DDR DRAM I/O voltage
Three-speed Ethernet I/O voltage
PCI, local bus, DUART, system control and power management,
I
Input voltage
Die-junction Temperature
2
C, and JTAG I/O voltage
MPC8555E PowerQUICC™ III Integrated Communications Processor Hardware Specification, Rev. 4.2
provides the recommended operating conditions for the MPC8555E. Note that the values in
are the recommended and tested operating conditions. Proper device operation outside of these
Recommended Operating Conditions
If the items on line 2 must precede items on line 1, please ensure that the
delay does not exceed 500 ms and the power sequence is not done greater
than once per day in production environment.
From a system standpoint, if the I/O power supplies ramp prior to the V
core supply, the I/Os on the MPC8555E may drive a logic one or zero during
power-up.
Characteristic
DDR DRAM signals
DDR DRAM reference
Three-speed Ethernet signals
PCI, local bus, DUART,
SYSCLK, system control and
power management, I
JTAG signals
Table 2. Recommended Operating Conditions
2
C, and
NOTE
NOTE
Symbol
MV
GV
OV
AV
LV
MV
OV
LV
V
T
DD
REF
DD
DD
DD
DD
IN
j
IN
IN
1.3 V ± 50 mV (for 1 GHz only)
1.3 V± 50 mV (for 1 GHz only)
Recommended Value
2.5 V ± 125 mV
3.3 V ± 165 mV
2.5 V ± 125 mV
3.3 V ± 165 mV
1.2 V ± 60 mV
1.2 V ± 60 mV
GND to GV
GND to GV
GND to OV
GND to LV
0 to 105
DD
DD
DD
DD
Freescale Semiconductor
DD
Unit
°C
V
V
V
V
V
V
V
V
V

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