IDT79RC32T351-133DH IDT, Integrated Device Technology Inc, IDT79RC32T351-133DH Datasheet - Page 17

• Manufacturer Part Number: IDT79RC32T351-133DH
• Description: IC MPU 32BIT CORE 133MHZ 208-QFP
• Manufacturer: IDT, Integrated Device Technology Inc
• Series: Interprise™r

Specifications of IDT79RC32T351-133DH

• Processor Type: RISC 32-Bit
• Speed: 133MHz
• Voltage: 2.5V
• Mounting Type: Surface Mount
• Package / Case: 208-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Other names: 79RC32T351-133DH

IDT 79RC32351
MDATA[31:0]
COLDRSTN
1.
2.
3.
4.
5.
6.
7.
8.
SYSCLKP
BOEN[0]
BDIRN
RSTN
CLKP
COLDRSTN asserted by external logic.
The RC32351 asserts RSTN, asserts BOEN[0] low, drives BDIRN low, and tri-states the data bus in response.
External logic begins driving valid boot configuration vector on the data bus, and the RC32351 starts sampling it.
External logic negates COLDRSTN and tri-states the boot configuration vector on MDATA[15:0]. The boot configuration vector must not be
tri-stated before COLDRSTN is deasserted. The RC32351 stops sampling the boot configuration vector.
The RC32351 starts driving the data bus, MDATA[31:0], deasserts BOEN[0] high, and drives BDIRN high.
SYSCLKP may be held constant after this point if Hold SYSCLKP Constant is selected in the boot configuration vector.
RSTN negated by RC32351.
CPU begins executing by taking MIPS reset exception, and the RC32351 starts sampling RSTN as a warm reset input.
1
>= 100 ms
Tdo2
2
Tpw1
3
BOOT VECT
>=10ms
Figure 6 Cold Reset AC Timing Waveform
*
Selection of 4096 or 64 cycles is selected by the boot configuration vector (fast reset).
4
Thld3
Trise1
17 of 42
>= 4096 CLKP clock cycles
OR
>= 64 CLKP clock cycles
5
6
*
FFFF_FFFF
7
>= 4096 CLKP clock cycles
OR
>= 64 CLKP clock cycles
*
8
May 25, 2004