20-668-0003 Rabbit Semiconductor, 20-668-0003 Datasheet - Page 193

• Manufacturer Part Number: 20-668-0003
• Description: IC CPU RABBIT2000 30MHZ 100PQFP
• Manufacturer: Rabbit Semiconductor

Specifications of 20-668-0003

• Processor Type: Rabbit 2000 8-Bit
• Speed: 30MHz
• Voltage: 2.7V, 3V, 3.3V, 5V
• Mounting Type: Surface Mount
• Package / Case: 100-MQFP, 100-PQFP
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 30 MHz
• Operating Supply Voltage: 0 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 40
• Number Of Timers: 8 & 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 20-668-0003; 316-1062

The Rabbit is highly code compatible with the Z80 and Z180, and it is easy to port non I/O
dependent code. The main areas of incompatibility are instructions that are concerned with
I/O or particular hardware implementations. The more important instructions that were
dropped from the Z80/Z180 are automatically simulated by an instruction sequence in the
Dynamic C assembler. A few fairly useless instructions have been dropped and cannot be
easily simulated. Code using these instructions should be rewritten.
The following Z80/Z180 instructions have been dropped and there are no exact substi-
tutes.
Most of these op codes deal with I/O devices and thus do not represent transportable code.
The only opcodes that are not processor I/O related are
CPIR
with decimal arithmetic,
inefficient. (The bit in the status register used for half carry is available and can be set and
cleared using the
these instructions should be rewritten. The instructions
repeating compare instructions. These instructions are not very useful because the scan
stops when equal compare is detected. Unequal compare would be more useful. They are
difficult to simulate efficiently, so it is suggested that code using these instructions be
rewritten, which in most cases should be quite easy.
The following op codes are dropped.
The remaining
location the base of which is established by the IIR register.
instruction, but this is not done automatically by the assembler since most of these instruc-
tions are used for debugging by Dynamic C.
The following instruction has had its op code changed.
Chapter 19 Differences Rabbit vs. Z80/Z180 Instructions
19. D
,
DAA
IND
CPIR
RST 0
EX (SP),HL
CPD
,
,
,
, and
,
HALT
OUTD
CPD
RST 8
RST
CPDR
IFFERENCES
,
,
,
PUSH AF
DI
INIR
CPDR
instructions are kept, but the interrupt vector is relocated to a variable
,
.
,
- old opcode
MLT SP
RST 0x30
,
DAA
EI
,
and
OTIR
,
IM 0
RRD
POP AF
,
is not a practical op code. The codes that are concerned
, and
,
INDR
IM 1
0x0E3,
RLD
instructions to gain access.) Usually code that uses
,
,
OTDR
R
, could be simulated, but the simulation is very
IM 2
new opcode - 0x0ED-0x054
ABBIT VS
,
,
TESTIO
OUT
,
CPI
MLT SP
,
IN
RST
,
I
MLT SP
,
CPIR
NSTRUCTIONS
OUT0
,
can be simulated by a call
DAA
. Z80/Z180
,
,
,
CPD
,
RRD
IN0
RRD
, and
,
,
,
RLD
RLD
SLP
CPDR
,
,
,
CPI
CPI
OUTI
are
,
,
187
,