Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 74

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Z9025106PSG

Manufacturer Part Number
Z9025106PSG
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheets

Specifications of Z9025106PSG

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
During the interrupt service routine, software must read the contents of Timer
Control Register 0. Then it checks which bit is set to 1, indicating the type of edge
which generated the interrupt.
Table 51 Timer Control Register 1 02h: Bank C (TCR1)
Bit/
Field
Reserved
CAPint_r
CAPint_f
Tout_CAP
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
Bit/
Field
Reserved
CAP Halt
CAP Edge
Bit
Position
7, 6, 5, 4, 3
2
1
0
Bit
Position
7
6
5, 4
R/W
7
x
R/W
6
1
R/W
W
W
W
W
R
R
R
R
R/W
R/W
R/W
W
R/W
R
5
0
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
32 KB Television Controller with OSD
Value
R/W
00
01
10
11
Return 0
No Effect
No Rising Edge is Captured
Rising Edge is Captured
No Effect
Reset Flag
No Falling Edge is Captured
Falling Edge is Captured
No Effect
Reset Flag
No Time-out of the Capture Timer
Time-out of the Capture Timer
No Effect
Reset Flag
0
1
4
0
Description
Return 0
No Effect
Capture Timer Running
Capture Timer Halted
No capture
Capture on Rising Edge Only
Capture on Falling Edge Only
Capture on Both Edges
R/W
3
0
R/W
2
0
R/W
PS001301-0800
1
0
R/W
0
0
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