Z9025106PSG Zilog, Z9025106PSG Datasheet - Page 71

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Z9025106PSG

Manufacturer Part Number
Z9025106PSG
Description
IC 32K 8BIT DTC OTP 42-DIP
Manufacturer
Zilog
Datasheets

Specifications of Z9025106PSG

Applications
TV Controller
Core Processor
Z8
Program Memory Type
OTP (32 kB)
Controller Series
Digital Television Controller (DTC)
Ram Size
300 x 8
Interface
I²C, 2-Wire Serial
Number Of I /o
27
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Through Hole
Package / Case
42-DIP (0.600", 15.24mm)
Processor Series
Z902x
Core
Z8
Data Bus Width
8 bit
Program Memory Size
32 KB
Data Ram Size
300 B
Interface Type
I2C
Maximum Clock Frequency
6 MHz
Number Of Programmable I/os
27
Mounting Style
Through Hole
On-chip Adc
4 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
7.3
Table 47 Port 5 Direction Control Register 0Eh: Bank B (PRT5_DRT)
Port 6 Data Register
Table 48 Port 6 Data Register 03h: Bank F (PRT6_DTA)
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
Bit/
Field
Reserved
P56 I/O Definition
P55 I/O Definition
P54 I/O Definition
P53 I/O Definition
P52 I/O Definition
P51 I/O Definition
P50 I/O Definition
Bit
R/W
Reset
Note: R = Read W = Write X = Indeterminate
R/W
7
1
R/W
7
x
R/W
6
1
Bit
Position
7
6
5
4
3
2
1
0
R/W
6
1
R/W
5
1
R/W
5
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
W
R
R/W
32 KB Television Controller with OSD
4
1
R/W
4
1
Value Description
0
1
0
1
0
1
0
1
0
1
0
1
0
1
R/W
3
1
R/W
Return 1
No Effect
Defines P56 as Output
Defines P56 as Input-POR
Defines P55 as Output
Defines P55 as Input-POR
Defines P54 as Output
Defines P54 as Input-POR
Defines P53 as Output
Defines P53 as Input-POR
Defines P52 as Output
Defines P52 as Input-POR
Defines P51 as Output
Defines P51 as Input-POR
Defines P50 as Output
Defines P50 as Input-POR
3
1
R/W
2
1
R/W
2
1
R/W
R/W
1
1
PS001301-0800
1
1
R/W
R/W
0
1
0
1
63

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