CY7C63723-SC Cypress Semiconductor Corp, CY7C63723-SC Datasheet - Page 2

IC MCU 8K LS USB/PS-2 18-SOIC

CY7C63723-SC

Manufacturer Part Number
CY7C63723-SC
Description
IC MCU 8K LS USB/PS-2 18-SOIC
Manufacturer
Cypress Semiconductor Corp
Series
enCoRe™r
Datasheets

Specifications of CY7C63723-SC

Applications
USB Microcontroller
Core Processor
M8B
Program Memory Type
OTP (8 kB)
Controller Series
CY7C637xx
Ram Size
256 x 8
Interface
PS2, USB
Number Of I /o
10
Voltage - Supply
4 V ~ 5.5 V
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
18-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
428-1323

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2.0
3.0
3.1
Cypress has reinvented its leadership position in the
low-speed USB market with a new family of innovative
microcontrollers. Introducing...enCoRe USB—“enhanced
Component Reduction.” Cypress has leveraged its design
expertise in USB solutions to create a new family of low-speed
USB microcontrollers that enables peripheral developers to
design new products with a minimum number of components.
At the heart of the enCoRe USB technology is the break-
through design of a crystalless oscillator. By integrating the
oscillator into our chip, an external crystal or resonator is no
longer needed. We have also integrated other external compo-
nents commonly found in low-speed USB applications such as
pull-up resistors, wake-up circuitry, and a 3.3V regulator. All of
this adds up to a lower system cost.
The CY7C637xx is an 8-bit RISC one-time-programmable
(OTP) microcontroller. The instruction set has been optimized
specifically for USB and PS/2 operations, although the micro-
controllers can be used for a variety of other embedded appli-
cations.
The CY7C637xx features up to 16 GPIO pins to support USB,
PS/2 and other applications. The I/O pins are grouped into two
ports (Port 0 to 1) where each pin can be individually
configured as inputs with internal pull-ups, open drain outputs,
or traditional CMOS outputs with programmable drive strength
of up to 50 mA output drive. Additionally, each I/O pin can be
used to generate a GPIO interrupt to the microcontroller. Note
the GPIO interrupts all share the same “GPIO” interrupt vector.
The CY7C637xx microcontrollers feature an internal oscillator.
With the presence of USB traffic, the internal oscillator can be
set to precisely tune to USB timing requirements (6 MHz
Document #: 38-08022 Rev. *B
enCoRe USB—The New USB Standard
Logic Block Diagram
Functional Overview
8K Byte
Brown-out
Oscillator
EPROM
Internal
Voltage
Reset
Reset
Watch
Timer
Low
Dog
XTALIN/P2.1
Oscillator
RISC
Core
8-bit
Xtal
FOR
FOR
XTALOUT
VREG/P2.0
Controller
Regulator
Interrupt
Wake-Up
Timer
3.3V
256 Byte
±1.5%). Optionally, an external 6-MHz ceramic resonator can
be used to provide a higher precision reference for USB
operation. This clock generator reduces the clock-related
noise emissions (EMI). The clock generator provides the 6-
and 12-MHz clocks that remain internal to the microcontroller.
The CY7C637xx has 8 Kbytes of EPROM and 256 bytes of
data RAM for stack space, user variables, and USB FIFOs.
These parts include low-voltage reset logic, a Watchdog timer,
a vectored interrupt controller, a 12-bit free-running timer, and
capture timers. The low-voltage reset (LVR) logic detects
when power is applied to the device, resets the logic to a
known state, and begins executing instructions at EPROM
address 0x0000. LVR will also reset the part when V
below the operating voltage range. The Watchdog timer can
be used to ensure the firmware never gets stalled for more
than approximately 8 ms.
The microcontroller supports 10 maskable interrupts in the
vectored interrupt controller. Interrupt sources include the USB
Bus-Reset, the 128-µs and 1.024-ms outputs from the
free-running timer, three USB endpoints, two capture timers,
an internal wake-up timer and the GPIO ports. The timers bits
cause periodic interrupts when enabled. The USB endpoints
interrupt after USB transactions complete on the bus. The
capture timers interrupt whenever a new timer value is saved
due to a selected GPIO edge event. The GPIO ports have a
level of masking to select which GPIO inputs can cause a
GPIO interrupt. For additional flexibility, the input transition
polarity that causes an interrupt is programmable for each
GPIO pin. The interrupt polarity can be either rising or falling
edge.
The free-running 12-bit timer clocked at 1 MHz provides two
interrupt sources as noted above (128 µs and 1.024 ms). The
timer can be used to measure the duration of an event under
firmware control by reading the timer at the start and end of an
Engine
USB &
D+,D–
RAM
USB
PS/2
Xcvr
P1.0–P1.7
12-bit
Timer
Port 1
GPIO
P0.0–P0.7
Capture
Timers
Port 0
GPIO
SPI
CY7C63722
CY7C63723
CY7C63743
Page 2 of 49
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