XC5VLX220T-1FFG1738C Xilinx Inc, XC5VLX220T-1FFG1738C Datasheet - Page 248
XC5VLX220T-1FFG1738C
Manufacturer Part Number
XC5VLX220T-1FFG1738C
Description
IC FPGA VIRTEX-5 220K 1738FBGA
Manufacturer
Xilinx Inc
Series
Virtex™-5 LXTr
Datasheets
1.XC5VLX30-1FFG324C.pdf
(91 pages)
2.XC5VLX30-1FFG324C.pdf
(13 pages)
3.XC5VLX30-1FFG324C.pdf
(385 pages)
Specifications of XC5VLX220T-1FFG1738C
Total Ram Bits
7815168
Number Of Logic Elements/cells
221184
Number Of Labs/clbs
17280
Number Of I /o
680
Voltage - Supply
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1738-BBGA, FCBGA
No. Of Logic Blocks
17280
No. Of Macrocells
220000
Family Type
Virtex-5
No. Of Speed Grades
1
No. Of I/o's
680
Clock Management
DCM, PLL
Core Supply
RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Company:
Part Number:
XC5VLX220T-1FFG1738C
Manufacturer:
Xilinx Inc
Quantity:
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Part Number:
XC5VLX220T-1FFG1738C
Manufacturer:
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Quantity:
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Chapter 6: SelectIO Resources
248
GTL (Gunning Transceiver Logic)
GTL_DCI Usage
The Gunning Transceiver Logic (GTL) standard is a high-speed bus standard (JESD8.3)
invented by Xerox. Xilinx has implemented the terminated variation for this standard. This
standard requires a differential amplifier input buffer and an open-drain output buffer.
The negative terminal of the differential input buffer is referenced to the V
A sample circuit illustrating a valid termination technique for GTL with external parallel
termination and unconnected V
X-Ref Target - Figure 6-36
GTL does not require a V
1.2V. GTL_DCI provides single termination to V
A sample circuit illustrating a valid termination technique for GTL_DCI with internal
parallel driver and receiver termination is shown in
X-Ref Target - Figure 6-37
Table 6-13
Table 6-13: GTL DC Voltage Specifications
V
V
V
V
V
V
V
CCO
CCO
REF
TT
IH
IL
OH
Figure 6-37: GTL_DCI with Internal Parallel Driver and Receiver Termination
Figure 6-36: GTL with External Parallel Termination and Unconnected V
= V
= V
= N × V
= Unconnected
REF
REF
V
CCO
lists the GTL DC voltage specifications.
Parameter
– 0.05
+ 0.05
TT
= 1.2V
R VRP = Z 0 = 50Ω
(1)
IOB
R
P
= Z 0 = 50Ω
CCO
www.xilinx.com
IOB
voltage. However, for GTL_DCI, V
V
CCO
TT
= 1.2V
is shown in
Z 0 = 50
Min
0.74
1.14
0.79
Z 0 = 50
–
–
–
V
TT
= 1.2V
CCO
Figure
R
P
for inputs or outputs.
Figure
IOB
= Z 0 = 50Ω
V
6-36.
REF
N/A
Typ
0.83
0.77
0.8
1.2
V
–
CCO
6-37.
= 0.8V
= 1.2V
V
CCO
IOB
Virtex-5 FPGA User Guide
UG190 (v5.3) May 17, 2010
R VRP = Z 0 = 50Ω
REF
must be connected to
= 0.8V
+
–
Max
0.86
1.26
0.81
ug190_6_35_030206
–
–
-
REF
pin.
ug190_6_34_022806
+
–
CCO
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