EP1SGX40DF1020C7N Altera, EP1SGX40DF1020C7N Datasheet - Page 180
EP1SGX40DF1020C7N
Manufacturer Part Number
EP1SGX40DF1020C7N
Description
IC STRATIX GX FPGA 40K 1020-FBGA
Manufacturer
Altera
Series
Stratix® GXr
Datasheet
1.EP1SGX10CF672C7N.pdf
(272 pages)
Specifications of EP1SGX40DF1020C7N
Number Of Logic Elements/cells
41250
Number Of Labs/clbs
4125
Total Ram Bits
3423744
Number Of I /o
624
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
1020-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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I/O Structure
4–114
Stratix GX Device Handbook, Volume 1
LVTTL
LVCMOS
2.5 V
1.8 V
1.5 V
3.3-V PCI
3.3-V PCI-X 1.0
LVDS
LVPECL
3.3-V PCML
HyperTransport
Differential HSTL
Differential SSTL
GTL
GTL+
1.5-V HSTL class I and II
1.8-V HSTL class I and II
SSTL-18 class I and II
SSTL-2 class I and II
Table 4–27. Stratix GX Supported I/O Standards (Part 1 of 2)
I/O Standard
(2)
(1)
Voltage-referenced
Voltage-referenced
Voltage-referenced
Voltage-referenced
Voltage-referenced
Voltage-referenced
■
■
■
■
■
■
■
■
■
■
■
■
■
Table 4–27
Single-ended
Single-ended
Single-ended
Single-ended
Single-ended
Single-ended
Single-ended
Differential
Differential
Differential
Differential
Differential
Differential
LVDS
LVPECL
3.3-V PCML
HyperTransport
Differential HSTL (on input/output clocks only)
Differential SSTL (on output column clock pins only)
GTL/GTL+
1.5-V HSTL class I and II
1.8-V HSTL Class I and II
SSTL-3 class I and II
SSTL-2 class I and II
SSTL-18 class I and II
CTT
Type
describes the I/O standards supported by Stratix GX devices.
Input Reference
Voltage (V
0.75
1.25
0.75
0.90
1.25
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
(V)
0.8
1.0
0.9
REF
)
Voltage (V
Output Supply
N/A
N/A
(V)
3.3
3.3
2.5
1.8
1.5
3.3
3.3
3.3
3.3
3.3
2.5
1.5
2.5
1.5
1.8
1.8
2.5
CCIO
)
Altera Corporation
Voltage (V
Termination
February 2005
Board
0.75
1.25
1.20
0.75
0.90
1.25
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
(V)
1.5
0.9
TT
)
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