EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 84
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EP2AGX45DF29I5N
Manufacturer Part Number
EP2AGX45DF29I5N
Description
IC ARRIA II GX FPGA 45K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX45DF29I5N.pdf
(306 pages)
Specifications of EP2AGX45DF29I5N
Number Of Logic Elements/cells
42959
Number Of Labs/clbs
1805
Total Ram Bits
3435
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
45125
# I/os (max)
364
Frequency (max)
500MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
45125
Ram Bits
3565158.4
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2AGX45DF29I5N
Manufacturer:
ALTERA
Quantity:
201
Company:
Part Number:
EP2AGX45DF29I5N
Manufacturer:
ALTERA
Quantity:
853
1–82
Document Revision History
Table 1–68. Document Revision History (Part 1 of 2)
Arria II Device Handbook Volume 3: Device Datasheet and Addendum
December 2010
July 2010
March 2010
February 2010
February 2010
November 2009
Date
Version
Table 1–68
4.0
2.0
3.0
2.3
2.2
2.1
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■
■
■
■
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■
■
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Updated for the Quartus II version 9.1 SP2 release:
■
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Updated Table 1–19.
Updated for Arria II GX v9.1 SP1 release:
■
■
■
Updated for Arria II GX v9.1 release:
■
■
■
■
■
Added Arria II GZ information.
Added
Updated
Table
Table
Updated
Updated for the Quartus II version 10.0 release.
Updated the first paragraph for searchability.
Minor text edits.
Updated Table 1–1, Table 1–4, Table 1–16, Table 1–19, Table 1–21, Table 1–23,
Table 1–25, Table 1–26, Table 1–30, and Table 1–35
Added Table 1–27 and Table 1–29.
Added I3 speed grade information to Table 1–19, Table 1–21, Table 1–22, Table 1–24,
Table 1–25, Table 1–30, Table 1–32, Table 1–33, Table 1–34, and Table 1–35.
Updated the “Operating Conditions” section.
Removed “Preliminary” from Table 1–19, Table 1–21, Table 1–22, Table 1–23,
Table 1–24, Table 1–25, Table 1–26, Table 1–28, Table 1–30, Table 1–32, Table 1–33,
Table 1–34, and Figure 1–4.
Minor text edits.
Updated Table 1–3, Table 1–7, Table 1–19, Table 1–21, Table 1–22, Table 1–24,
Table 1–25 and Table 1–33.
Updated “Recommended Operating Conditions” section.
Minor text edits.
Updated Table 1–19, Table 1–23, Table 1–28, Table 1–30, and Table 1–33.
Added Figure 1–5.
Minor text edits.
Updated Table 1–1, Table 1–4, Table 1–13, Table 1–14, Table 1–19, Table 1–15,
Table 1–22, Table 1–24, and Table 1–28.
Added Table 1–6 and Table 1–33.
Added “Bus Hold” on page 1–5.
Added “IOE Programmable Delay” section.
Minor text edit.
lists the revision history for this chapter.
1–37,
1–63.
Table 1–61
Table
Figure
Table
1–1,
1–5.
1–40,
with Arria II GX information.
Table
Table
1–2,
1–42,
Table
1–5,
Table
Changes
Table
1–44,
Chapter 1: Device Datasheet for Arria II Devices
1–6,
Table
Table
1–45,
1–7,
December 2010 Altera Corporation
Table
Table
1–57,
Document Revision History
1–11,
Table
Table
1–61, and
1–35,