EP2AGX45DF29I5N Altera, EP2AGX45DF29I5N Datasheet - Page 9

• Manufacturer Part Number: EP2AGX45DF29I5N
• Description: IC ARRIA II GX FPGA 45K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX45DF29I5N

• Number Of Logic Elements/cells: 42959
• Number Of Labs/clbs: 1805
• Total Ram Bits: 3435
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 45125
• # I/os (max): 364
• Frequency (max): 500MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 45125
• Ram Bits: 3565158.4
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: -40C to 100C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Document Revision History
Document Revision History
Table 5. Document Revision History
February 2011 Altera Corporation
February 2011
November 2010
October 2010
September 2010
August 2009
June 2009
Date
Workaround
1
Version
An invalid application configuration image is classified as one of the following:
■
■
■
The remote system upgrade feature works correctly with all other reconfiguration
trigger conditions.
A workaround is being implemented in the ALTREMOTE_UPDATE megafunction
and will be available in the Quartus II software version 9.1. If you are using the
remote system upgrade feature prior to the Quartus II software version 9.1 release,
contact Altera
Table 5
3.2
3.3
3.1
3.0
2.0
1.0
A partially programmed application image
A blank application image
An application image assigned with a wrong start address
Added the
■
■
Added the “External Memory Interface DLL Frequency Range Update” section.
■
■
Added “High I/O Pin Leakage Current” and “XAUI State Machine Failure—Channel 0 Shifted
by One Cycle” sections.
Initial release.
lists the revision history for this Errata Sheet.
Added the “Dynamic Reconfiguration Issue Between PCIe Mode and Any Other
Transceiver Mode” and “Quartus II Software Incorrect Setting for the Transceiver CDR in
All Modes Except PCIe Mode” sections.
Minor text edits.
Added the “Quartus II Mapping Issue with PCI Express (PCIe) Interfaces Using the Hard
IP Block” section.
Applied the new document template.
®
Technical Support at
“Transmitter PLL Lock (pll_locked) Status Signal”
www.altera.com/support
Changes
section.
Errata Sheet for Arria II GX Devices
for assistance.
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