EP1S10F780C6 Altera, EP1S10F780C6 Datasheet - Page 86
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EP1S10F780C6
Manufacturer Part Number
EP1S10F780C6
Description
IC STRATIX FPGA 10K LE 780-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet
1.EP1S10F780C7.pdf
(276 pages)
Specifications of EP1S10F780C6
Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
426
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Other names
544-1111
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Part Number:
EP1S10F780C6
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FC
Quantity:
34
Company:
Part Number:
EP1S10F780C6
Manufacturer:
ALTERA
Quantity:
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Part Number:
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Manufacturer:
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Company:
Part Number:
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Manufacturer:
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Quantity:
44
Digital Signal Processing Block
Figure 2–41. DSP Block Interface to Interconnect
2–72
Stratix Device Handbook, Volume 1
C4 and C8
Interconnects
LAB
DSP Block to
LAB Row Interface
Block Interconnect Region
Direct Link Interconnect
from Adjacent LAB
10
A bus of 18 control signals feeds the entire DSP block. These signals
include clock[0..3] clocks, aclr[0..3] asynchronous clears,
ena[1..4] clock enables, signa, signb signed/unsigned control
signals, addnsub1 and addnsub3 addition and subtraction control
signals, and accum_sload[0..1] accumulator synchronous loads. The
Row Interface
18
3
Block
18 Inputs per Row
R4 and R8 Interconnects
10
9
Control
[17..0]
DSP Block
Row Structure
[17..0]
18 Outputs per Row
Nine Direct Link Outputs
to Adjacent LABs
18
18
9
Altera Corporation
Direct Link Interconnect
from Adjacent LAB
July 2005
LAB