EP1S10F672C7 Altera, EP1S10F672C7 Datasheet - Page 218

IC STRATIX FPGA 10K LE 672-FBGA

EP1S10F672C7

Manufacturer Part Number
EP1S10F672C7
Description
IC STRATIX FPGA 10K LE 672-FBGA
Manufacturer
Altera
Series
Stratix®r
Datasheet

Specifications of EP1S10F672C7

Number Of Logic Elements/cells
10570
Number Of Labs/clbs
1057
Total Ram Bits
920448
Number Of I /o
345
Voltage - Supply
1.425 V ~ 1.575 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
672-FBGA
Family Name
Stratix
Number Of Logic Blocks/elements
10570
# I/os (max)
345
Frequency (max)
420.17MHz
Process Technology
0.13um (CMOS)
Operating Supply Voltage (typ)
1.5V
Logic Cells
10570
Ram Bits
920448
Operating Supply Voltage (min)
1.425V
Operating Supply Voltage (max)
1.575V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
672
Package Type
FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1109

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP1S10F672C7
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1S10F672C7
Manufacturer:
Altera
Quantity:
10 000
Part Number:
EP1S10F672C7
Manufacturer:
ALTERA
Quantity:
6
Part Number:
EP1S10F672C7
Manufacturer:
ALTERA
0
Part Number:
EP1S10F672C7
Manufacturer:
ALTERA
Quantity:
350
Part Number:
EP1S10F672C7
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Part Number:
EP1S10F672C7AA
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1S10F672C7ES
Manufacturer:
ALTERA
Quantity:
89
Part Number:
EP1S10F672C7ES
Quantity:
47
Part Number:
EP1S10F672C7ES
Manufacturer:
ALTERA
0
Part Number:
EP1S10F672C7L
Manufacturer:
ALTERA
0
Part Number:
EP1S10F672C7N
Manufacturer:
ALTERA
Quantity:
3 000
Part Number:
EP1S10F672C7N
Manufacturer:
ALTERA/阿尔特拉
Quantity:
20 000
Timing Model
4–48
Stratix Device Handbook, Volume 1
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
INSU
INH
OUTCO
XZ
ZX
INSU
INH
OUTCO
XZ
ZX
INSUPLL
INHPLL
OUTCOPLL
XZPLL
ZXPLL
Table 4–79. EP1S40 External I/O Timing on Column Pins Using Fast Regional Clock Networks
Table 4–80. EP1S40 External I/O Timing on Column Pins Using Regional Clock Networks
Parameter
Parameter
2.696
0.000
2.506
2.446
2.446
2.413
0.000
2.668
2.608
2.608
1.385
0.000
1.117
1.057
1.057
-5 Speed Grade
-5 Speed Grade
Min
Min
5.015
4.889
4.889
5.254
5.128
5.128
2.382
2.256
2.256
Max
Max
Tables 4–79
and row pins for EP1S40 devices.
2.907
0.000
2.506
2.446
2.446
2.581
0.000
1.376
0.000
-6 Speed Grade
2.668
2.608
2.608
1.117
1,057
1,057
-6 Speed Grade
Min
Min
through
5.348
5.216
5.216
5.628
5.496
5.496
2.552
2.420
2.420
Max
Max
4–84
show the external timing parameters on column
3.290
0.000
2.506
2.446
2.446
2.914
0.000
2.668
2.608
2.608
1.609
0.000
1.117
1.057
1.057
-7 Speed Grade
-7 Speed Grade
Min
Min
5.809
5.685
5.685
6.132
6.008
6.008
2.504
2.380
2.380
Max
Max
2.899
0.000
2.698
2.638
2.638
-8 Speed Grade
2.938
0.000
2.869
2.809
2.809
1.837
0.000
1.117
1.057
1.057
-8 Speed Grade
Min
Min
Altera Corporation
7.286
7.171
7.171
7.307
7.192
7.192
2.542
2.427
2.427
Max
Max
January 2006
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for EP1S10F672C7