EP4CE55F29C8LN Altera, EP4CE55F29C8LN Datasheet - Page 291
EP4CE55F29C8LN
Manufacturer Part Number
EP4CE55F29C8LN
Description
IC CYCLONE IV FPGA 55K 780FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CE55F29C8LN
Number Of Logic Elements/cells
55856
Number Of Labs/clbs
3491
Total Ram Bits
2340000
Number Of I /o
374
Voltage - Supply
0.97 V ~ 1.03 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 1: Cyclone IV Transceivers Architecture
Receiver Channel Datapath
© December 2010 Altera Corporation
Figure 1–12. AC-Coupled Link with OCT
In a DC-coupled link, the transmitter DC common mode voltage is seen unblocked at
the receiver input buffer as shown in
depends on the transmitter common mode voltage and the receiver common mode
voltage. When using the receiver OCT and on-chip biasing circuitry in a DC coupled
link, you must ensure the transmitter common mode voltage is compatible with the
receiver common mode requirements. If you disable the OCT, you must terminate and
bias the receiver externally and ensure compatibility between the transmitter and the
receiver common mode voltage.
Figure 1–13. DC-Coupled Link with OCT
Transmitter
Transmitter
TX Termination
TX Termination
TX
V
TX
V
CM
CM
Physical Medium
Physical Medium
Physical Medium
Physical Medium
Figure
1–13. The link common mode voltage
AC Coupling
AC Coupling
Capacitor
Capacitor
Cyclone IV Device Handbook, Volume 2
RX
V
RX
V
CM
CM
RX Termination
RX Termination
Receiver
Receiver
1–11
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