EP4CE55F29C8LN Altera, EP4CE55F29C8LN Datasheet - Page 189
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EP4CE55F29C8LN
Manufacturer Part Number
EP4CE55F29C8LN
Description
IC CYCLONE IV FPGA 55K 780FBGA
Manufacturer
Altera
Series
CYCLONE® IV Er
Datasheets
1.EP4CGX15BN11C8N.pdf
(44 pages)
2.EP4CGX15BN11C8N.pdf
(14 pages)
3.EP4CGX15BN11C8N.pdf
(478 pages)
4.EP4CGX15BN11C8N.pdf
(10 pages)
Specifications of EP4CE55F29C8LN
Number Of Logic Elements/cells
55856
Number Of Labs/clbs
3491
Total Ram Bits
2340000
Number Of I /o
374
Voltage - Supply
0.97 V ~ 1.03 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
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Chapter 8: Configuration and Remote System Upgrades in Cyclone IV Devices
Configuration
Figure 8–7. Single-Device AP Configuration Using Numonyx P30 and P33 Flash Memory
Notes to
(1) Connect the pull-up resistors to the V
(2) The nCEO pin is left unconnected or used as a user I/O pin when it does not feed the nCE pin of another device.
(3) The MSEL pin settings vary for different configuration voltage standards and POR time. To connect MSEL[3..0], refer to
(4) AP configuration ignores the WAIT signal during configuration mode. However, if you are accessing flash during user mode with user logic, you
© December 2010 Altera Corporation
page
can optionally use normal I/O to monitor the WAIT signal from the Numonyx P30 or P33 flash.
Figure
8–9. Connect the MSEL pins directly to V
8–7:
1
1
1
Numonyx P30/P33 Flash
Figure 8–7
memory to the Cyclone IV E device pins.
In a single-device AP configuration, the maximum board loading and board trace
length between supported parallel flash and Cyclone IV E devices must follow the
recommendations listed in
If you use the AP configuration scheme for Cyclone IV E devices, the V
banks 1, 6, 7, and 8 must be 3.3, 3.0, 2.5, or 1.8 V. Altera does not recommend using the
level shifter between the Numonyx P30 or P33 flash and the Cyclone IV E device in
the AP configuration scheme.
There are no series resistors required in AP configuration mode for Cyclone IV E
devices when using the Numonyx flash at 2.5-, 3.0-, and 3.3-V I/O standard. The
output buffer of the Numonyx P30 IBIS model does not overshoot above 4.1 V. Thus,
series resistors are not required for the 2.5-, 3.0-, and 3.3-V AP configuration option.
However, if there are any other devices sharing the same flash I/Os with Cyclone IV E
devices, all shared pins are still subject to the 4.1-V limit and may require series
resistors.
DQ[15:0]
A[24:1]
CCIO
RST#
ADV#
shows the interface for the Numonyx P30 flash memory and P33 flash
WAIT
WE#
CLK
CE#
OE#
supply of the bank in which the pin resides.
CCA
or GND.
GND
Table 8–9 on page
10k
nCE
DCLK
nRESET
FLASH_nCE
nOE
nAVD
nWE
I/O (4)
DATA[15..0]
PADD[23..0]
V CCIO (1)
Cyclone IV E Device
10k
V CCIO (1) V CCIO (1)
8–27.
10k
MSEL[3..0]
nCEO
Cyclone IV Device Handbook, Volume 1
N.C. (2)
(3)
CCIO
Table 8–5 on
of I/O
8–23
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