EP3C10U256C6N Altera, EP3C10U256C6N Datasheet - Page 131
![IC CYCLONE III FPGA 10K 256-UBGA](/photos/6/73/67381/ep3c10u256c6n_sml.jpg)
EP3C10U256C6N
Manufacturer Part Number
EP3C10U256C6N
Description
IC CYCLONE III FPGA 10K 256-UBGA
Manufacturer
Altera
Series
Cyclone® IIIr
Datasheets
1.EP3C5F256C8N.pdf
(5 pages)
2.EP3C5F256C8N.pdf
(34 pages)
3.EP3C5F256C8N.pdf
(66 pages)
4.EP3C5F256C8N.pdf
(14 pages)
5.EP3C5F256C8N.pdf
(76 pages)
6.EP3C10U256C6N.pdf
(274 pages)
Specifications of EP3C10U256C6N
Number Of Logic Elements/cells
10320
Number Of Labs/clbs
645
Total Ram Bits
423936
Number Of I /o
182
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
256-UBGA
Family Name
Cyclone III
Number Of Logic Blocks/elements
10320
# I/os (max)
182
Frequency (max)
500MHz
Process Technology
65nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
10320
Ram Bits
423936
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
256
Package Type
UFBGA
For Use With
544-2601 - KIT DEV CYCLONE III LS EP3CLS200544-2411 - KIT DEV NIOS II CYCLONE III ED.
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-2433
EP3C10U256C6N
EP3C10U256C6N
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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Chapter 7: High-Speed Differential Interfaces in the Cyclone III Device Family
High-Speed I/O Standards Support
High-Speed I/O Standards Support
LVDS I/O Standard Support in the Cyclone III Device Family
© December 2009
f
Altera Corporation
Table 7–4
Cyclone III LS devices.
Table 7–4. Cyclone III LS Devices Migratable Differential Channels
This section provides information about the high-speed I/O standards supported in
the Cyclone III device family.
The LVDS I/O standard is a high-speed, low-voltage swing, low power, and general
purpose I/O interface standard. The Cyclone III device family meets the
ANSI/TIA/EIA-644 standard with the following exceptions:
■
■
For more information about the LVDS I/O standard electrical specifications in the
Cyclone III device family, refer to the
Device Data Sheet
Note to
(1) The migratable differential channels for Cyclone III devices are not directly migratable to Cyclone III LS devices
Package
The maximum differential output voltage (V
maximum V
The input voltage range is reduced to the range of 1.0 V to 1.6 V, 0.5 V to 1.85 V, or
0 V to 1.8 V based on different frequency ranges. The ANSI/TIA/EIA-644
specification supports an input voltage range of 0 V to 2.4 V.
U484
Type
F484
F780
and vice versa.
Table
lists the numbers of differential channels that can be migrated in
7–4:
EP3CLS70 and EP3CLS100
EP3CLS70 and EP3CLS100
EP3CLS70 and EP3CLS150
EP3CLS70 and EP3CLS200
EP3CLS100 and EP3CLS150
EP3CLS100 and EP3CLS200
EP3CLS150 and EP3CLS200
EP3CLS70 and EP3CLS100
EP3CLS70 and EP3CLS150
EP3CLS70 and EP3CLS200
EP3CLS100 and EP3CLS150
EP3CLS100 and EP3CLS200
EP3CLS150 and EP3CLS200
Migration between Devices
OD
chapters.
for ANSI specification is 450 mV.
Cyclone III Device Data Sheet
User I/O
101
101
169
169
169
169
169
169
71
71
71
71
75
OD
) is increased to 600 mV. The
Migratable Channels
Clock
Input
Cyclone III Device Handbook, Volume 1
(Note 1)
8
8
8
8
8
8
8
8
8
8
8
8
8
and
Output
Clock
4
4
4
4
4
4
4
4
4
4
4
4
4
Cyclone III LS
Total
113
113
181
181
181
181
181
181
83
83
87
83
83
7–7
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