EP2S30F672I4 Altera, EP2S30F672I4 Datasheet - Page 146

IC STRATIX II FPGA 30K 672-FBGA

EP2S30F672I4

Manufacturer Part Number
EP2S30F672I4
Description
IC STRATIX II FPGA 30K 672-FBGA
Manufacturer
Altera
Series
Stratix® IIr
Datasheet

Specifications of EP2S30F672I4

Number Of Logic Elements/cells
33880
Number Of Labs/clbs
1694
Total Ram Bits
1369728
Number Of I /o
500
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
672-FBGA
Family Name
Stratix II
Number Of Logic Blocks/elements
33880
# I/os (max)
500
Frequency (max)
711.24MHz
Process Technology
90nm (CMOS)
Operating Supply Voltage (typ)
1.2V
Logic Cells
33880
Ram Bits
1369728
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
-40C to 100C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
672
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Not Compliant
Other names
544-1899
EP2S30F672I4

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Operating Conditions
5–10
Stratix II Device Handbook, Volume 1
Note to
(1)
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Table 5–14. 3.3-V PCI Specifications (Part 2 of 2)
Table 5–15. PCI-X Mode 1 Specifications
Table 5–16. SSTL-18 Class I Specifications
Symbol
Symbol
Symbol
IL
OH
OL
CCIO
IH
IL
IPU
OH
OL
CCIO
REF
TT
IH
IL
IH
IL
OH
OL
(AC)
(DC)
(AC)
(DC)
This specification is supported across all the programmable drive settings available for this I/O standard as shown
in the Stratix II Architecture chapter in volume 1 of the Stratix II Device Handbook.
Table
Low-level input voltage
High-level output voltage
Low-level output voltage
Output supply voltage
High-level input voltage
Low-level input voltage
Input pull-up voltage
High-level output voltage
Low-level output voltage
Output supply voltage
Reference voltage
Termination voltage
High-level DC input voltage
Low-level DC input voltage
High-level AC input voltage
Low-level AC input voltage
High-level output voltage
Low-level output voltage
5–16:
Parameter
Parameter
Parameter
I
I
OH
OL
I
I
I
I
OUT
OUT
OUT
OUT
= 6.7 mA
Conditions
= –6.7 mA
Conditions
Conditions
= –500 μA
= 1,500 μA
= –500 μA
= 1,500 μA
(1)
(1)
V
V
V
V
0.9 × V
0.5 × V
0.7 × V
0.9 × V
Minimum
Minimum
Minimum
REF
REF
TT
REF
–0.30
0.855
–0.3
1.71
+ 0.475
3.0
+ 0.125
– 0.04
+ 0.25
CCIO
CCIO
CCIO
CCIO
Typical
Typical
Typical
0.900
V
1.80
REF
Altera Corporation
V
0.35 × V
V
V
V
V
0.3 × V
0.1 × V
0.1 × V
Maximum
Maximum
Maximum
REF
REF
REF
TT
CCIO
0.945
1.89
– 0.475
3.6
– 0.125
+ 0.04
– 0.25
+ 0.5
CCIO
CCIO
CCIO
CCIO
April 2011
Unit
Unit
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V

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