EP2SGX30DF780C5N Altera, EP2SGX30DF780C5N Datasheet - Page 115

• Manufacturer Part Number: EP2SGX30DF780C5N
• Description: IC STRATIX II GX 30K 780-FBGA
• Manufacturer: Altera
• Series: Stratix® II GXr

Specifications of EP2SGX30DF780C5N

• Number Of Logic Elements/cells: 33880
• Number Of Labs/clbs: 1694
• Total Ram Bits: 1369728
• Number Of I /o: 361
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 780-FBGA
• Family Name: Stratix II GX
• Number Of Logic Blocks/elements: 33880
• # I/os (max): 361
• Frequency (max): 609.76MHz
• Process Technology: SRAM
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 33880
• Ram Bits: 1369728
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1754

Altera Corporation
October 2007
c2
c3
c4
c5
Enhanced PLL 11 outputs
c0
c1
c2
c3
c4
c5
Clock pins
CLK4p
CLK5p
CLK6p
CLK7p
CLK4n
CLK5n
CLK6n
CLK7n
Drivers from internal logic
GCLKDRV0
GCLKDRV1
Table 2–28. Global and Regional Clock Connections from Top Clock Pins and Enhanced PLL Outputs
Table 2–29. Global and Regional Clock Connections from Bottom Clock Pins and Enhanced PLL
Outputs
(Part 2 of 2)
Regional Clock Network
Regional Clock Network
Bottom Side Global and
Top Side Global and
Connectivity
Connectivity
(Part 1 of 2)
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Stratix II GX Device Handbook, Volume 1
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Stratix II GX Architecture
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2–107
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