XC3S1400AN-4FGG676C Xilinx Inc, XC3S1400AN-4FGG676C Datasheet - Page 23
![IC SPARTAN-3AN FPGA 1400K 676FBG](/photos/6/73/67300/b-676_sml.jpg)
XC3S1400AN-4FGG676C
Manufacturer Part Number
XC3S1400AN-4FGG676C
Description
IC SPARTAN-3AN FPGA 1400K 676FBG
Manufacturer
Xilinx Inc
Series
Spartan™-3ANr
Datasheets
1.XC3S50A-4VQG100C.pdf
(7 pages)
2.XC3S50AN-4TQG144C.pdf
(2 pages)
3.XC3S50AN-4TQG144C.pdf
(123 pages)
Specifications of XC3S1400AN-4FGG676C
Total Ram Bits
589824
Number Of Logic Elements/cells
25344
Number Of Labs/clbs
2816
Number Of I /o
502
Number Of Gates
1400000
Voltage - Supply
1.14 V ~ 1.26 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
676-BBGA
No. Of Logic Blocks
25344
No. Of Gates
1400000
No. Of Macrocells
25344
Family Type
Spartan-3AN
No. Of Speed Grades
4
No. Of I/o's
502
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
122-1552
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XC3S1400AN-4FGG676C
Manufacturer:
XILINX
Quantity:
201
Company:
Part Number:
XC3S1400AN-4FGG676C
Manufacturer:
Xilinx Inc
Quantity:
10 000
Part Number:
XC3S1400AN-4FGG676C
Manufacturer:
XILINX/赛灵思
Quantity:
20 000
Device DNA Read Endurance
Table 17: Device DNA Identifier Memory Characteristics
In-System Flash Memory Data Retention, Program/Write Endurance
Table 18: In-System Flash (ISF) Memory Characteristics
DS557 (v4.1) April 1, 2011
Product Specification
Notes:
1.
ISF_PAGE_REWRITE
ISF_PAGE_CYCLES
ISF_SPR_CYCLES
ISF_SEC_CYCLES
ISF_RETENTION
DNA_CYCLES
Minimum value at which functionality is still guaranteed. Do not exceed these values.
ISF_ACTIVE
Symbol
Symbol
Number of READ operations or JTAG ISC_DNA read operations. Unaffected by
HOLD or SHIFT operations
Data retention
Time that the ISF memory is selected and active. SPI_ACCESS design primitive
pins CSB = Low, CLK toggling
Number of program/erase cycles, per ISF memory page
Number of cumulative random (non-sequential) page erase/program operations
within a sector before pages must be rewritten
Number of program/erase cycles for Sector Protection Register
Number of program cycles for Sector Lockdown Register per sector,
user-programmable field in Security Register, and Power-of-2 Page Size
Description
Description
www.xilinx.com
Spartan-3AN FPGA Family: DC and Switching Characteristics
Minimum
30,000,000
Minimum
100,000
10,000
10,000
20
2
1
(1)
Cycles
Cycles
Cycles
cycles
Units
Units
Years
Years
Cycle
Read
23