EP2C8Q208C8N Altera, EP2C8Q208C8N Datasheet - Page 62

IC CYCLONE II FPGA 8K 208-PQFP

EP2C8Q208C8N

Manufacturer Part Number
EP2C8Q208C8N
Description
IC CYCLONE II FPGA 8K 208-PQFP
Manufacturer
Altera
Series
Cyclone® IIr
Datasheet

Specifications of EP2C8Q208C8N

Number Of Logic Elements/cells
8256
Number Of Labs/clbs
516
Total Ram Bits
165888
Number Of I /o
138
Voltage - Supply
1.15 V ~ 1.25 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
208-MQFP, 208-PQFP
Family Name
Cyclone® II
Number Of Logic Blocks/elements
8256
# I/os (max)
138
Frequency (max)
402.58MHz
Process Technology
90nm
Operating Supply Voltage (typ)
1.2V
Logic Cells
8256
Ram Bits
165888
Operating Supply Voltage (min)
1.15V
Operating Supply Voltage (max)
1.25V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
208
Package Type
PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Other names
544-1671

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I/O Structure & Features
2–50
Cyclone II Device Handbook, Volume 1
Open-Drain Output
Cyclone II devices provide an optional open-drain (equivalent to an
open-collector) output for each I/O pin. This open-drain output enables
the device to provide system-level control signals (that is, interrupt and
write-enable signals) that can be asserted by any of several devices.
Note to
(1)
LVCMOS (1.5 V)
SSTL-2 class I
SSTL-2 class II
SSTL-18 class I
SSTL-18 class II
HSTL-18 class I
HSTL-18 class II
HSTL-15 class I
HSTL-15 class II
Table 2–16. Programmable Drive Strength (Part 2 of 2)
The default current in the Quartus II software is the maximum setting for each
I/O standard.
I/O Standard
Table
2–16:
Top & Bottom I/O Pins
I
OH
/I
12
16
20
24
10
12
16
18
10
12
16
18
20
10
12
16
OL
2
4
6
8
8
6
8
8
8
Current Strength Setting (mA)
Altera Corporation
Side I/O Pins
Note (1)
February 2007
12
16
10
10
12
2
4
6
8
6
8
8
8

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