EP2C8Q208C8N Altera, EP2C8Q208C8N Datasheet - Page 50

• Manufacturer Part Number: EP2C8Q208C8N
• Description: IC CYCLONE II FPGA 8K 208-PQFP
• Manufacturer: Altera
• Series: Cyclone® IIr

Specifications of EP2C8Q208C8N

• Number Of Logic Elements/cells: 8256
• Number Of Labs/clbs: 516
• Total Ram Bits: 165888
• Number Of I /o: 138
• Voltage - Supply: 1.15 V ~ 1.25 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 208-MQFP, 208-PQFP
• Family Name: Cyclone® II
• Number Of Logic Blocks/elements: 8256
• # I/os (max): 138
• Frequency (max): 402.58MHz
• Process Technology: 90nm
• Operating Supply Voltage (typ): 1.2V
• Logic Cells: 8256
• Ram Bits: 165888
• Operating Supply Voltage (min): 1.15V
• Operating Supply Voltage (max): 1.25V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: PQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant
• Other names: 544-1671

I/O Structure & Features
2–38
Cyclone II Device Handbook, Volume 1
Figure 2–20. Cyclone II IOE Structure
Note to
(1)
The IOEs are located in I/O blocks around the periphery of the Cyclone II
device. There are up to five IOEs per row I/O block and up to four IOEs
per column I/O block (column I/O blocks span two columns). The row
I/O blocks drive row, column (only C4 interconnects), or direct link
interconnects. The column I/O blocks drive column interconnects.
Figure 2–21
Figure 2–22
There are two paths available for combinational or registered inputs to the logic
array. Each path contains a unique programmable delay chain.
Figure
Logic Array
shows how a row I/O block connects to the logic array.
shows how a column I/O block connects to the logic array.
2–20:
Input (1)
Output
OE
Output Register
Input Register
OE Register
Altera Corporation
February 2007