MSC8126TVT6400 Freescale Semiconductor, MSC8126TVT6400 Datasheet - Page 20

• Manufacturer Part Number: MSC8126TVT6400
• Description: IC DSP QUAD 16B 400MHZ 431FCPBGA
• Manufacturer: Freescale Semiconductor
• Series: MSC81xx StarCorer
• Type: SC140 Corer

Specifications of MSC8126TVT6400

• Interface: DSI, Ethernet, RS-232
• Clock Rate: 400MHz
• Non-volatile Memory: External
• On-chip Ram: 1.436MB
• Voltage - I/o: 3.30V
• Voltage - Core: 1.20V
• Operating Temperature: -40°C ~ 105°C
• Mounting Type: Surface Mount
• Package / Case: 431-FCPBGA
• Device Core Size: 16b
• Clock Freq (max): 400MHz
• Mips: 400
• Device Input Clock Speed: 400MHz
• Operating Supply Voltage (typ): 1.1/1.1/1.2/1.2/3.3V
• Operating Temp Range: -40C to 105C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 431
• Package Type: FCBGA
• For Use With: MSC8126ADSE - KIT ADVANCED DEV SYSTEM 8126
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Electrical Characteristics
2.5.4.1
Asserting
V
2.5.4.2
The MSC8126 has two mechanisms for writing the reset configuration:
Fourteen signal levels (see Chapter 1 for signal description details) are sampled on
Configuration Mode and boot and operating conditions:
20
Configuration pins sampled (Refer to
Section 2.5.4.1 for details).
SPLL state reset
System reset configuration write through
the DSI
System reset configuration write though
the system bus
HRESET driven
SIU registers reset
IPBus modules reset (TDM, UART,
Timers, DSI, IPBus master, GIC, HS, and
GPIO)
SRESET driven
SC140 extended cores reset
MQBS reset
DD
•
•
•
•
•
•
•
•
•
•
and
Reset Action/Reset Source
V
Through the direct slave interface (DSI)
Through the system bus. When the reset configuration is written through the system bus, the MSC8126 acts as a
configuration master or a configuration slave. If configuration slave is selected, but no special configuration word is
written, a default configuration word is applied.
RSTCONF
CNFGS
DSISYNC
DSI64
CHIP_ID[0–3]
BM[0–2]
SWTE
MODCK[1–2]
PORESET
DDH
are both at their nominal levels.
Power-On Reset (PORESET) Pin
Reset Configuration
initiates the power-on reset flow.
MSC8126 Quad Digital Signal Processor Data Sheet, Rev. 15
Table 11. Reset Actions for Each Reset Source
External only
(PORESET)
Power-On
Reset
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
PORESET
(Software Watchdog or
Hard Reset (HRESET)
External or Internal
Bus Monitor)
must be asserted externally for at least 16
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
PORESET
External
Yes
Yes
Yes
Yes
No
No
No
No
No
No
Soft Reset (SRESET)
deassertion to define the Reset
Freescale Semiconductor
EXTEST, CLAMP, or
Depends on command
JTAG Command:
CLKIN
HIGHZ
Yes
Yes
Yes
No
No
No
No
No
No
cycles after