EPM9560ARC208-10 Altera, EPM9560ARC208-10 Datasheet - Page 22

• Manufacturer Part Number: EPM9560ARC208-10
• Description: IC MAX 9000 CPLD 560 208-RQFP
• Manufacturer: Altera
• Series: MAX® 9000r

Specifications of EPM9560ARC208-10

• Programmable Type: In System Programmable
• Delay Time Tpd(1) Max: 10.0ns
• Voltage Supply - Internal: 4.75 V ~ 5.25 V
• Number Of Logic Elements/blocks: 35
• Number Of Macrocells: 560
• Number Of Gates: 12000
• Number Of I /o: 153
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 208-RQFP
• Voltage: 3.3V/5V
• Memory Type: EEPROM
• Number Of Logic Elements/cells: 35
• Family Name: MAX 9000
• # Macrocells: 560
• Number Of Usable Gates: 12000
• Frequency (max): 144.9MHz
• Propagation Delay Time: 10ns
• Number Of Logic Blocks/elements: 35
• # I/os (max): 153
• Operating Supply Voltage (typ): 5V
• In System Programmable: Yes
• Operating Supply Voltage (min): 4.75V
• Operating Supply Voltage (max): 5.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 208
• Package Type: RQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Features: -
• Lead Free Status / Rohs Status: Not Compliant
• Other names: 544-2363

MAX 9000 Programmable Logic Device Family Data Sheet
22
Table 7. MAX 9000 t
Table 8. MAX 9000 In-System Programming Times for Different Test Clock Frequencies
Table 9. MAX 9000 Stand-Alone Verification Times for Different Test Clock Frequencies
EPM9320A
EPM9560A
EPM9320A
EPM9560A
EPM9320
EPM9400
EPM9480
EPM9560
EPM9320
EPM9400
EPM9480
EPM9560
Device
Device
EPM9320A
EPM9560A
EPM9320
EPM9400
EPM9480
EPM9560
Device
10 MHz
10 MHz
12.09
12.34
12.59
12.84
0.33
0.36
0.39
0.42
PULSE
& Cycle
The programming times described in
with the worst-case method using the ISP algorithm.
Tables 8
verification times for several common test clock frequencies.
5 MHz
5 MHz
12.38
12.67
12.96
13.26
0.52
0.57
0.63
0.69
t
PPULSE
11.79
12.00
12.21
12.42
TCK
and
Values
2 MHz
2 MHz
(s)
13.27
13.68
14.09
14.50
1.06
1.20
1.34
1.48
Programming
9
show the in-system programming and stand alone
1 MHz
1 MHz
14.76
15.37
15.98
16.59
1.96
2.24
2.53
2.81
2,966,000
3,365,000
3,764,000
4,164,000
Cycle
f
f
TCK
TCK
PTCK
500 kHz
500 kHz
17.72
18.73
19.74
20.75
3.77
4.33
4.90
5.47
Tables 7
200 kHz
200 kHz
10.60
12.02
13.44
26.62
28.83
31.03
33.24
9.18
t
VPULSE
Stand-Alone Verification
0.15
0.15
0.15
0.15
through
(s)
100 kHz
100 kHz
18.21
21.05
23.89
26.73
41.45
45.65
49.85
54.06
9
Altera Corporation
are associated
50 kHz
50 kHz
36.27
41.95
47.63
53.31
71.11
79.30
87.49
95.70
1,806,000
2,090,000
2,374,000
2,658,000
Cycle
VTCK
Units
Units
s
s
s
s
s
s
s
s