C8051F336-GMR Silicon Laboratories Inc, C8051F336-GMR Datasheet - Page 93
C8051F336-GMR
Manufacturer Part Number
C8051F336-GMR
Description
Microcontrollers (MCU) 16KB 10ADC 10DAC 768Ram MCU Lead Free
Manufacturer
Silicon Laboratories Inc
Datasheet
1.C8051F336-GM.pdf
(226 pages)
Specifications of C8051F336-GMR
Processor Series
C8051F3x
Core
8051
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
16 KB
Data Ram Size
768 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
17
Number Of Timers
4
Operating Supply Voltage
2.7 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
QFN-20
3rd Party Development Tools
KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F336DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
On-chip Dac
10 bit
Package
20QFN
Device Core
8051
Family Name
C8051F336
Maximum Speed
25 MHz
Ram Size
768 Byte
Operating Temperature
-40 to 85 °C
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F336-GMR
Manufacturer:
SILICON
Quantity:
100
Part Number:
C8051F336-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
20 000
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Security Lock Byte is unlocked when no other Flash pages are locked (all bits of the Lock Byte are
‘1’) and locked when any other Flash pages are locked (any bit of the Lock Byte is ‘0’). An example
is shown in Figure 16.1.
16.3. Security Options
The CIP-51 provides security options to protect the Flash memory from inadvertent modification by soft-
ware as well as to prevent the viewing of proprietary program code and constants. The Program Store
Write Enable (bit PSWE in register PSCTL) and the Program Store Erase Enable (bit PSEE in register
PSCTL) bits protect the Flash memory from accidental modification by software. PSWE must be explicitly
set to ‘1’ before software can modify the Flash memory; both PSWE and PSEE must be set to ‘1’ before
software can erase Flash memory. Additional security features prevent proprietary program code and data
constants from being read or altered across the C2 interface.
A Security Lock Byte located in Flash user space offers protection of the Flash program memory from
access (reads, writes, or erases) by unprotected code or the C2 interface. See
Organization” on page 74
user to lock n 512-byte Flash pages, starting at page 0 (addresses 0x0000 to 0x01FF), where n is the 1’s
complement number represented by the Security Lock Byte. Note that the page containing the Flash
Flash pages locked:
Security Lock Byte:
1s Complement:
for the location of the security byte. The Flash security mechanism allows the
Figure 16.1. Security Byte Decoding
3 (First two Flash pages + Lock Byte Page)
Rev.1.0
00000010b
11111101b
C8051F336/7/8/9
Section “13. Memory
93
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