MT46V128M8P-6T IT:A Micron Technology Inc, MT46V128M8P-6T IT:A Datasheet - Page 4

• Manufacturer Part Number: MT46V128M8P-6T IT:A
• Description: DRAM Chip DDR SDRAM 1G-Bit 128Mx8 2.5V 66-Pin TSOP Tray
• Manufacturer: Micron Technology Inc
• Type: DDR SDRAMr

Specifications of MT46V128M8P-6T IT:A

• Package: 66TSOP
• Density: 1 Gb
• Address Bus Width: 16 Bit
• Operating Supply Voltage: 2.5 V
• Maximum Clock Rate: 333 MHz
• Maximum Random Access Time: 0.7 ns
• Operating Temperature: -40 to 85 °C

State Diagram
Figure 2:
PDF: 09005aef80a2f898/Source: 09005aef82a95a3a
DDR_x4x8x16_Core1.fm - 1Gb DDR: Rev. I, Core DDR: Rev. B 12/07 EN
Simplified State Diagram
Note:
applied
Power
This diagram represents operations within a single bank only and does not capture concur-
rent operations in other banks.
ACT = ACTIVE
BST = BURST TERMINATE
CKEH = Exit power-down
CKEL = Enter power-down
EMR = Extended mode register
LMR = LOAD MODE REGISTER
MR = Mode register
WRITE
Precharge
all banks
Power
PRE
LMR
EMR
PRE
WRITE A
MR
on
Write A
power-
Active
down
Write
CKE LOW
WRITE
LMR
4
CKE HIGH
WRITE A
PRE
precharged
Precharge
Micron Technology, Inc., reserves the right to change products or specifications without notice.
all banks
PREALL
active
ACT
Row
PRE
Idle
READ A
PRE = PRECHARGE
PREALL = PRECHARGE all banks
READ A = READ with auto precharge
REFA = AUTO REFRESH
REFS = Enter self refresh
REFSX = Exit self refresh
WRITE A = WRITE with auto precharge
CKEH
READ
REFS
READ A
PRE
REFSX
CKEL
1Gb: x4, x8, x16 DDR SDRAM
READ
Precharge
REFA
refresh
power-
down
Self
BST
Read A
Burst
Read
stop
Automatic sequence
Command sequence
©2003 Micron Technology, Inc. All rights reserved.
READ A
refresh
Auto
State Diagram
READ