MT47H32M16HR-25E IT:F TR Micron Technology Inc, MT47H32M16HR-25E IT:F TR Datasheet - Page 19
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MT47H32M16HR-25E IT:F TR
Manufacturer Part Number
MT47H32M16HR-25E IT:F TR
Description
Manufacturer
Micron Technology Inc
Type
DDR2 SDRAMr
Datasheet
1.MT47H32M16HR-25E_ITF_TR.pdf
(131 pages)
Specifications of MT47H32M16HR-25E IT:F TR
Organization
32Mx16
Density
512Mb
Address Bus
15b
Access Time (max)
400ps
Maximum Clock Rate
800MHz
Operating Supply Voltage (typ)
1.8V
Package Type
FBGA
Operating Temp Range
-40C to 85C
Operating Supply Voltage (max)
1.9V
Operating Supply Voltage (min)
1.7V
Supply Current
295mA
Pin Count
84
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant
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FBGA Package Capacitance
Table 4: Input Capacitance
PDF: 09005aef82f1e6e2
512MbDDR2.pdf - Rev. Q 10/10 EN
Parameter
Input capacitance: CK, CK#
Delta input capacitance: CK, CK#
Input capacitance: Address balls, bank address
balls, CS#, RAS#, CAS#, WE#, CKE, ODT
Delta input capacitance: Address balls, bank
address balls, CS#, RAS#, CAS#, WE#, CKE, ODT
Input/output capacitance: DQ, DQS, DM, NF
Delta input/output capacitance: DQ, DQS, DM,
NF
Notes:
1. This parameter is sampled. V
2. The capacitance per ball group will not differ by more than this maximum amount for
3. ΔC are not pass/fail parameters; they are targets.
4. Reduce MAX limit by 0.25pF for -25 and -25E speed devices.
5. Reduce MAX limit by 0.5pF for -3, -3E, -5E, -25, -25E, and -37E speed devices.
MHz, T
with I/O balls, reflecting the fact that they are matched in loading.
any given device.
C
= 25°C, V
Symbol
OUT(DC)
C
C
C
C
C
DCK
C
DIO
CK
IO
DI
I
= V
19
DDQ
DD
= +1.8V ±0.1V, V
/2, V
Min
1.0
1.0
2.5
–
–
–
OUT
Micron Technology, Inc. reserves the right to change products or specifications without notice.
(peak-to-peak) = 0.1V. DM input is grouped
512Mb: x4, x8, x16 DDR2 SDRAM
DDQ
Max
0.25
0.25
2.0
2.0
4.0
0.5
= +1.8V ±0.1V, V
© 2004 Micron Technology, Inc. All rights reserved.
Units
pF
pF
pF
pF
pF
pF
REF
= V
Packaging
SS
, f = 100
Notes
2, 3
1, 4
2, 3
1, 5
2, 3
1
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