MT48LC4M16A2P-75 L:GTR Micron Technology Inc, MT48LC4M16A2P-75 L:GTR Datasheet - Page 7
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MT48LC4M16A2P-75 L:GTR
Manufacturer Part Number
MT48LC4M16A2P-75 L:GTR
Description
Manufacturer
Micron Technology Inc
Type
SDRAMr
Datasheet
1.MT48LC4M16A2P-75_LGTR.pdf
(72 pages)
Specifications of MT48LC4M16A2P-75 L:GTR
Organization
4Mx16
Density
64Mb
Address Bus
14b
Access Time (max)
6/5.4ns
Maximum Clock Rate
133MHz
Operating Supply Voltage (typ)
3.3V
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Supply Current
140mA
Pin Count
54
Mounting
Surface Mount
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Compliant
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Functional Block Diagrams
Figure 1:
PDF: 09005aef80725c0b/Source: 09005aef806fc13c
64MSDRAM_2.fm - Rev. N 12/08 EN
BA0, BA1
A0–A11,
RAS#
CAS#
WE#
CKE
CLK
CS#
14
ADDRESS
REGISTER
16 Meg x 4 SDRAM
MODE REGISTER
CONTROL
LOGIC
12
COUNTER
REFRESH
12
10
2
12
ADDRESS
2
ROW-
MUX
COUNTER/
COLUMN-
CONTROL
ADDRESS
LATCH
BANK
LOGIC
12
DECODER
ADDRESS
BANK0
LATCH
ROW-
&
10
4096
7
READ DATA LATCH
DQM MASK LOGIC
SENSE AMPLIFIERS
(4,096 x 1,024 x 4)
WRITE DRIVERS
I/O GATING
DECODER
MEMORY
COLUMN
BANK0
ARRAY
1024
4096
(x4)
BANK1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
BANK2
BANK3
Functional Block Diagrams
64Mb: x4, x8, x16 SDRAM
4
4
1
REGISTER
REGISTER
OUTPUT
INPUT
DATA
DATA
©2000 Micron Technology, Inc. All rights reserved.
1
4
DQM
DQ0–DQ3
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