MT48H32M16LFCJ-75 Micron Technology Inc, MT48H32M16LFCJ-75 Datasheet - Page 37

• Manufacturer Part Number: MT48H32M16LFCJ-75
• Manufacturer: Micron Technology Inc
• Type: SDRAMr

Specifications of MT48H32M16LFCJ-75

• Organization: 32Mx16
• Density: 512Mb
• Address Bus: 15b
• Access Time (max): 9/6ns
• Maximum Clock Rate: 133MHz
• Operating Supply Voltage (typ): 1.8V
• Package Type: VFBGA
• Operating Temp Range: 0C to 70C
• Operating Supply Voltage (max): 1.95V
• Operating Supply Voltage (min): 1.7V
• Supply Current: 90mA
• Pin Count: 54
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

Figure 29:
Figure 30:
Burst Read/Single Write
PDF: 09005aef81ca5de4/Source: 09005aef81ca5e03
MT48H32M16LF_1.fm - Rev. J 2/08 EN
Clock Suspend During WRITE Burst
Clock Suspend During READ Burst
Notes:
Notes:
COMMAND
1. For this example, BL = 4 or greater, and DQM is LOW.
COMMAND
1. For this example, CL = 2, BL = 4 or greater, and DQM is LOW.
The burst read/single write mode is entered by programming the write burst mode bit
(M9) in the mode register to a logic 1. In this mode, all WRITE commands result in the
access of a single column location (burst of one), regardless of the programmed BL.
READ commands access columns according to the programmed BL and sequence, just
as in the normal mode of operation.
INTERNAL
INTERNAL
ADDRESS
ADDRESS
CLOCK
CLOCK
CLK
CKE
CLK
CKE
D
DQ
IN
NOP
T0
BANK,
COL n
T0
READ
WRITE
BANK,
COL n
T1
T1
D
NOP
n
IN
512Mb: 32 Meg x 16, 16 Meg x 32 Mobile SDRAM
T2
T2
NOP
37
D
OUT
n
T3
T3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
n + 1
D
OUT
NOP
n + 1
T4
T4
D
NOP
IN
DON’T CARE
T5
T5
NOP
n + 2
D
NOP
IN
n + 2
D
OUT
DON’T CARE
T6
NOP
D
n + 3
OUT
©2005 Micron Technology, Inc. All rights reserved.
Operations