TS68EN360MAB/Q33L E2V, TS68EN360MAB/Q33L Datasheet - Page 41

• Manufacturer Part Number: TS68EN360MAB/Q33L
• Manufacturer: E2V

Specifications of TS68EN360MAB/Q33L

• Operating Temperature (max): 125C
• Operating Temperature Classification: Military
• Mounting: Surface Mount
• Lead Free Status / Rohs Status: Not Compliant

e2v semiconductors SAS 2008
Figure 7-26. TS68040 Internal Registers Read Cycles
Notes:
Figure 7-27. TS68040 Internal Registers Write Cycles
Notes:
ATTRIBUTES
(040 WRITE)
TRANSFER
(OUTPUT)
(OUTPUT)
(OUTPUT)
A31-A0
(INPUT)
(INPUT)
(INPUT)
D31-D0
(INPUT)
CLKO1
1. Three wait states are inserted when reading the SIM, dual-port RAM, and CPM. Four wait states are
2. TS68040 Transfer Attribute Signals = SIZx, TTx, TMx, R/W, LOCK.
1. Two wait states are inserted when writing. Three wait states are inserted when writing to the dual-port
2. TS68040 Transfer Attribute Signals = SIZx, TTx, TMx, R/W, LOCK.
ATTRIBUTES
TBI
TA
TS
(040 WRITE)
TRANSFER
(OUTPUT)
(OUTPUT)
(OUTPUT)
inserted when reading the SI RAM. Additional wait states may be inserted when the SHEN1-SHEN0 =
10 and one of the internal masters is accessing an internal peripheral.
RAM and CPM. Four wait states are inserted when writing to the SI RAM. Additional wait states may be
inserted when the SHEN1-SHEN0 = 10 and one of the internal masters is accessing an internal
peripheral.
(INPUT)
(INPUT)
D31-D0
A31-A0
MBARE
(INPUT)
(INPUT)
(INPUT)
CLKO1
TBI
TA
TS
C1
252
251
C1
252
C2
251
253
C2
255
253
CW
CW
255
3Ð4 CLOCKS
2Ñ4 CLOCKS
CW
CW
260
257
CW
257
254
CW
CW
254
0886C–HIREL–04/08
258
TS68EN360
C1
256
263
256
259
258
C1
259
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