ED DDR3 1G PCH9000 Samsung Semiconductor, ED DDR3 1G PCH9000 Datasheet - Page 37

• Manufacturer Part Number: ED DDR3 1G PCH9000
• Manufacturer: Samsung Semiconductor
• Type: DDR3 SDRAMr

Specifications of ED DDR3 1G PCH9000

• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Access Time (max): 20ns
• Maximum Clock Rate: 1.333GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 160mA
• Pin Count: 96
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

K4B1G04(08/16)46E
[ Table 39 ] IDD7 Measurement - Loop Pattern
Note :
1. DM must be driven LOW all the time. DQS, DQS are used according to RD Commands, otherwise MID-LEVEL.
2. Burst Sequence driven on each DQ signal by Read Command. Outside burst operation. DQ signals are MID-LEVEL.
10
11
12
13
14
15
16
17
18
19
0
1
2
3
4
5
6
7
8
9
2*nFAW+nRRD+1
2*nFAW+nRRD+2
2*nFAW+2*nRRD
2*nFAW+3*nRRD
2*nFAW+4*nRRD
3*nFAW+2*nRRD
3*nFAW+3*nRRD
3*nFAW+4*nRRD
nFAW+2*nRRD
nFAW+3*nRRD
nFAW+4*nRRD
2*nFAW+nRRD
3*nFAW+nRRD
nFAW+nRRD
2*nFAW+0
2*nFAW+1
2*nFAW+2
nRRD + 1
nRRD + 2
2 * nRRD
3 * nRRD
4 * nRRD
3*nFAW
nRRD
nFAW
...
...
0
1
2
repeat Sub-Loop 1, but BA[2:0] = 5
repeat Sub-Loop 0, but BA[2:0] = 6
repeat Sub-Loop 1, but BA[2:0] = 7
repeat Sub-Loop 10, but BA[2:0] = 2
repeat Sub-Loop 11, but BA[2:0] = 3
repeat Sub-Loop 11, but BA[2:0] = 5
repeat Sub-Loop 10, but BA[2:0] = 6
repeat Sub-Loop 11, but BA[2:0] = 7
repeat above D Command until nRRD - 1
repeat above D Command until 2*nRRD-1
repeat Sub-Loop 0, but BA[2:0] = 2
repeat Sub-Loop 1, but BA[2:0] = 3
Assert and repeat above D Command until nFAW - 1, if necessary
repeat Sub-Loop 0, but BA[2:0] = 4
Assert and repeat above D Command until 2*nFAW - 1, if necessary
Repeat above D Command until 2*nFAW + nRRD - 1
Repeat above D Command until 2*nFAW + 2*nRRD - 1
Assert and repeat above D Command until 3*nFAW - 1, if necessary
repeat Sub-Loop 10, but BA[2:0] = 4
Assert and repeat above D Command until 4*nFAW - 1, if necessary
RDA
RDA
RDA
RDA
ACT
ACT
ACT
ACT
D
D
D
D
D
D
D
D
0
0
1
0
0
1
1
1
0
0
1
0
0
1
1
1
1
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
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1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
3
7
0
0
0
1
1
1
3
7
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
0
1
0
0
1
0
0
0
0
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1Gb DDR3 SDRAM
Rev. 1.0 February 2009
0
0
0
F
F
F
F
F
F
F
F
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
00000000
00000000
00110011
00110011
-
-
-
-
-
-
-
-
-
-
-
-