ED DDR3 1G PCH9000 Samsung Semiconductor, ED DDR3 1G PCH9000 Datasheet - Page 26

• Manufacturer Part Number: ED DDR3 1G PCH9000
• Manufacturer: Samsung Semiconductor
• Type: DDR3 SDRAMr

Specifications of ED DDR3 1G PCH9000

• Organization: 64Mx16
• Density: 1Gb
• Address Bus: 16b
• Access Time (max): 20ns
• Maximum Clock Rate: 1.333GHz
• Operating Supply Voltage (typ): 1.5V
• Package Type: FBGA
• Operating Temp Range: 0C to 95C
• Operating Supply Voltage (max): 1.575V
• Operating Supply Voltage (min): 1.425V
• Supply Current: 160mA
• Pin Count: 96
• Mounting: Surface Mount
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Compliant

K4B1G04(08/16)46E
9.9 ODT Timing Definitions
9.9.1 Test Load for ODT Timings
Different than for timing measurements, the reference load for ODT timings is defined in Figure 13.
9.9.2 ODT Timing Definitions
Definitions for tAON, tAONPD, tAOF, tAOFPD and tADC are provided in Table 28 and subsequent figures. Measurement reference settings are provided
in Table 29.
[ Table 28 ] ODT Timing Definitions
[ Table 29 ] Reference Settings for ODT Timing Measurements
tAON
tAONPD
tAOF
tAOFPD
tADC
tAON
tAONPD
tAOF
tAOFPD
tADC
Symbol
Parameter
Measured
Rising edge of CK - CK defined by the end point of ODTLon
Rising edge of CK - CK with ODT being first registered high
Rising edge of CK - CK defined by the end point of ODTLoff
Rising edge of CK - CK with ODT being first registered low
Rising edge of CK - CK defined by the end point of ODTLcnw,
ODTLcwn4 of ODTLcwn8
RTT_Nom Setting
R
R
R
R
R
R
R
R
R
Begin Point Definition
ZQ
ZQ
ZQ
ZQ
ZQ
ZQ
ZQ
ZQ
ZQ
CK,CK
/12
/12
/12
/12
/12
/4
/4
/4
/4
Figure 13. ODT Timing Reference Load
RTT_Wr Setting
DUT
Timing Reference Points
R
NA
NA
NA
NA
NA
NA
NA
NA
ZQ
/2
DQ, DM
DQS , DQS
TDQS , TDQS
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V
V
DDQ
SSQ
Extrapolated point at V
Extrapolated point at V
End point: Extrapolated point at V
End point: Extrapolated point at V
End point: Extrapolated point at V
respectively
V
SW1
0.05
0.10
0.05
0.10
0.05
0.10
0.05
0.10
0.20
[V]
RTT
=25 ohm
End Point Definition
SSQ
SSQ
V
V
TT
SSQ
V
=
SW2
0.10
0.20
0.10
0.20
0.10
0.20
0.10
0.20
0.30
1Gb DDR3 SDRAM
[V]
RTT_Nom
RTT_Nom
RTT_Wr
Rev. 1.0 February 2009
and V
RTT_Nom
Note
Figure 14
Figure 15
Figure 16
Figure 17
Figure 18
Figure