GWIXP465BAB Intel, GWIXP465BAB Datasheet - Page 20
![no-image](/images/manufacturer_photos/0/3/336/intel_sml.jpg)
GWIXP465BAB
Manufacturer Part Number
GWIXP465BAB
Description
Manufacturer
Intel
Datasheet
1.GWIXP465BAB.pdf
(163 pages)
Specifications of GWIXP465BAB
Core Operating Frequency
266MHz
Operating Supply Voltage (typ)
1.3/1.5/2.5/3.3V
Operating Supply Voltage (max)
1.575/2.7/3.465V
Operating Supply Voltage (min)
1.235/2.3/3.135V
Package Type
BGA
Pin Count
544
Mounting
Surface Mount
Operating Temperature (max)
70C
Operating Temperature (min)
0C
Operating Temperature Classification
Commercial
Lead Free Status / Rohs Status
Not Compliant
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Functional Overview
May 2005
20
Table 3.
Network Processor Functions (Sheet 2 of 2)
The NPE core is a hardware-multi-threaded processor engine that is used to accelerate functions
that are difficult to achieve high performance in a standard RISC processor. Each NPE core is a
133.32-MHz (which is 4 * OSC_IN input pin) processor core that has self-contained instruction
memory and self-contained data memory that operate in parallel. Each NPE core has 4 K words of
instruction memory and 4 K words of data memory.
In addition to having separate instruction/data memory and local-code store, the NPE core supports
hardware multi-threading with support for multiple contexts. The support of hardware multi-
threading creates an efficient processor engine with minimal processor stalls due to the ability of
the processor core to switch contexts in a single clock cycle, based on a prioritized/preemptive
basis. The prioritized/preemptive nature of the context switching allows time-critical applications
to be implemented in a low-latency fashion — which is required when processing multi-media
applications.
The NPE core also connects to several hardware-based coprocessors that are used to implement
functions that are difficult for a processor to implement. These functions include:
These coprocessors are implemented in hardware, enabling the coprocessors and the NPE
processor core to operate in parallel.
With the addition of the new switching coprocessor (SWCP) and the Ethernet coprocessors,
functions like a four-port, Layer-2 switch can be easily implemented using all Intel-based silicon.
Also, by using NPEs to implement switching functions, value added features like VLAN or IP
switching can be easily upgraded using existing silicon. Therefore, speeding up the end customer’s
time to market while keeping product costs the same.
The combined forces of the hardware multi-threading, local-code store, independent instruction
memory, independent data memory, and parallel processing — contained on the NPE — allows the
Intel XScale core to be utilized for application purposes. The multi-processing capability of the
peripheral interface functions allows unparalleled performance to be achieved by the application
running on the Intel XScale core.
Configuration 7
Configuration 8
Configuration 9
Configuration 10
Configuration 11
Configuration 12
Configuration 13
•
•
•
•
•
HSS Serialization/ De-serialization
DES/DES3/AES
MD-5
Learning/filtering content addressable memory
UTOPIA Level 2 Framing
Device
UTOPIA
Intel
HSS
®
X
X
X
X
X
X
X
IXP45X and Intel
MII /SMII
SMII
SMII
SMII
SMII
MII
MII
MII
A
MII / 4 SMII
®
4 SMII
4 SMII
4 SMII
4 SMII
SMII
SMII
SMII
IXP46X Product Line of Network Processors Datasheet
B
•
•
•
•
MII / SMII
CRC checking/generation
SHA-1/256/384/512
HDLC bit stuffing/de-stuffing
Media Access Controller functionality
SMII
SMII
SMII
SMII
MII
MII
MII
C
AES / DES
/ DES3
Document Number:
X
X
X
X
X
X
X
HDLC SHA MD-5
8
8
8
8
8
8
8
306261-002
X
X
X
X
X
X
X
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