PEB20571FV31XT Lantiq, PEB20571FV31XT Datasheet - Page 248
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PEB20571FV31XT
Manufacturer Part Number
PEB20571FV31XT
Description
Manufacturer
Lantiq
Datasheet
1.PEB20571FV31XT.pdf
(308 pages)
Specifications of PEB20571FV31XT
Lead Free Status / Rohs Status
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6.2.10.3 DMA Mailbox Interrupt Status Register
DINSTA
Reset value: 0000
Contains the status of the DMA Mailbox. The bits in this register are reset by a read
access to register DINSTA.
TINT
RINT
TMSK
RMSK
Data Sheet
15
7
x
x
Register
Transmit Interrupt from DMA Mailbox (Read only)
0 =
1 =
Receive Interrupt from DMA Mailbox (Read only)
0 =
1 =
Transmit Interrupt Mask (Read/ Write)
0 =
1 =
Receive Interrupt Mask (Read/ Write)
0 =
1 =
H
14
6
x
x
No transmit interrupt from DMA-mailbox occurred
The DMA-controller has finished to write the requested number of
bytes to the DMA-mailbox.
No transmit interrupt from DMA-mailbox occurred
The DMA-controller has finished to read the requested number of
bytes from the DMA-mailbox.
Disable transmit interrupt
Enable transmit interrupt
Disable receive interrupt
Enable receive interrupt
13
5
x
x
12
4
DSP: read/ write
x
x
231
TINT
11
3
x
RINT
10
2
x
Register Description
TMSK
Address: D152
9
x
1
PEB 20570
PEB 20571
2003-07-31
RMSK
8
0
x
H
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