PEF80902HV1.1XT Infineon Technologies, PEF80902HV1.1XT Datasheet - Page 28

• Manufacturer Part Number: PEF80902HV1.1XT
• Manufacturer: Infineon Technologies

Specifications of PEF80902HV1.1XT

• Lead Free Status / Rohs Status: Compliant

Table 8
0
1
1
0
1
1
0
0
1
2.3.4
Decoding is done in the reverse manner of coding. The received blocks of 3 ternary
symbols are converted into blocks of 4 bits. The decoding algorithm is given in
As in the encoding table, the left hand symbol of each block (both binary and ternary) is
the first bit and the right hand is the last. If a ternary block "0 0 0" is received, it is decoded
to binary "0 0 0 0". This pattern usually occurs only during deactivation.
•
Table 9
0 0 0,
0 – +
+ – 0
0 0 +,
– + 0
0 + +,
– + +,
– 0 +
+ 0 0,
+ – +,
+ + –,
+ 0 –
+ + +,
Data Sheet
0
1
0
1
0
1
0
1
1
1
0
0
1
1
1
0
0
0
Decoding from Ternary to Binary Data
1
1
0
0
0
1
0
1
0
MMS 43 Coding Table (cont’d)
4B3T Decoding Table
Ternary Block
+ 0 +,
– – 0
– 0 0
– – +
0 – –
– – –
+ – –
– + –
S1
0
0
+
–
+
+
+
0
+
0
+
0
+
+
+
0
+
+
+
0
0
+
–
0
+
+
+
2
2
2
2
2
3
3
3
4
0 – 0
S2
0
0
+
–
+
0
0
–
–
0
+
0
+
+
0
–
0
+
20
+
0
0
+
–
–
0
0
–
0
0
0
0
0
0
0
0
1
1
1
1
1
3
3
3
3
3
1
1
1
1
S3
0
0
+
–
+
0
0
–
–
0
+
0
–
–
0
–
0
+
0
0
0
0
1
1
1
1
0
0
0
0
1
Binary Block
+
0
0
+
–
–
0
0
–
Functional Description
4
4
4
2
2
2
2
2
2
0
0
1
1
0
0
1
1
0
0
1
1
0
S4
–
–
0
–
+
0
0
–
–
PEF 80902
–
0
–
–
–
0
–
0
+
2001-11-12
0
1
0
1
0
1
0
1
0
1
0
1
0
Table
0
–
–
+
–
–
0
0
–
2
2
2
3
3
3
3
3
3
9.