STM32W108HBU6 STMicroelectronics, STM32W108HBU6 Datasheet - Page 80

• Manufacturer Part Number: STM32W108HBU6
• Manufacturer: STMicroelectronics

Specifications of STM32W108HBU6

• Operating Temperature (min): -40C
• Operating Temperature (max): 85C
• Processing Unit: Microprocessor
• Operating Supply Voltage (min): 1.18V
• Operating Supply Voltage (typ): 1.25V
• Operating Supply Voltage (max): 1.32V
• Package Type: VFQFPN EP
• Pin Count: 40
• Mounting: Surface Mount
• Rad Hardened: No
• Lead Free Status / Rohs Status: Supplier Unconfirmed

Serial interfaces
9.5.1
Note:
9.5.2
80/208
The I
●
●
Table 17
pins are configured as open-drain outputs, they require external pull-up resistors.
Table 17.
Setup and configuration
The I
operates only in master mode and supports both Standard (100 kbps) and Fast (400 kbps)
I
supported.
The I
generator. SCL is produced by dividing down 12 MHz according to this equation:
EXP is the value written to the SCx_RATEEXP register and LIN is the value written to the
SCx_RATELIN register.
Standard-Mode I
Table 18.
At 400 kbps, the Philips I
1.3 µs, but on the STM32W108 it is 1.25 µs. If a slave device requires strict compliance with
SCL timing, the clock rate must be lowered to 375 kbps.
Constructing frames
The I
SC_TWISTART, SC_TWISTOP, SC_TWISEND, and SC_TWIRECV bits in the
SCx_TWICTRL1 registers.
2
Direction
GPIO Configuration
SC1 pin
SC2 pin
C modes. Address arbitration is not implemented, so multiple master applications are not
SDA (Serial Data) - bidirectional serial data
SCL (Serial Clock) - bidirectional serial clock
2
2
2
2
C master controller uses just two signals:
C controller is enabled by writing 3 to the SCx_MODE register. The I
C master controller's serial clock (SCL) is produced by a programmable clock
C master controller supports generating various frame segments by means of the
lists the GPIO pins used by the SC1 and SC2 I
Clock Rate
100 kbps
375 kbps
400 kbps
I
I
2
2
C Master GPIO Usage
C clock rate programming
2
C (100 kbps) and Fast-Mode I
I2C clock rate programming on page 80
2
C Bus specification requires the minimum low period of SCL to be
Figure 19
Doc ID 16252 Rev 7
Rate
summarizes these frames.
Alternate Output
=
SCx_RATELIN
Input / Output
(open drain)
---------------------------------------- -
(
LIN
SDA
PB1
PA1
14
15
14
12MHz
+
2
C (400 kbps) operation.
1
)x2
2
EXP
C master controllers. Because the
STM32W108CB, STM32W108HB
shows the rate settings for
Alternate Output
SCx_RATEEXP
Input / Output
(open drain)
SCL
PB2
PA2
2
C controller
3
1
1