CY7C4231V-15AC Cypress Semiconductor Corp, CY7C4231V-15AC Datasheet - Page 10

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CY7C4231V-15AC

Manufacturer Part Number
CY7C4231V-15AC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheets

Specifications of CY7C4231V-15AC

Density
16Kb
Word Size
9b
Sync/async
Synchronous
Expandable
Yes
Package Type
TQFP
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Lead Free Status / Rohs Status
Not Compliant
Switching Waveforms
Programmable Almost Full Flag Timing
Write Programmable Registers
(if applicable)
Notes:
18. If a write is performed on this rising edge of the write clock, there will be Full – (m–1) words of the FIFO when PAF goes LOW.
19. PAF offset = m.
20. 64–m words for CY7C4421V, 256-m words in FIFO for CY7C4201V, 512–m words for CY7C4211V, 1024–m words for CY7C4221V, 2048–m words for
21. t
WEN2/LD
WEN2
WEN1
CY7C4231V, 4096–m words for CY7C4241V, 8192–m words for CY7C4251V.
and the rising edge of WCLK is less than t
WCLK
WCLK
D
WEN1
REN1,
SKEW2
RCLK
REN2
0
PAF
–D
8
is the minimum time between a rising RCLK edge and a rising WCLK edge for PAF to change during that clock cycle. If the time between the rising edge of RCLK
t
t
CLKH
CLKH
FULL
(continued)
t
CLK
t
t
ENS
ENS
SKEW2
t
IN FIFO
DS
M+1 WORDS
PAE OFFSET
t
t
, then PAF may not change state until the next WCLK.
ENS
ENS
LSB
t
t
ENH
ENH
t
t
CLKL
CLKL
t
ENH
t
DH
Note 19
Note 18
PAE OFFSET
10
MSB
t
PAF
CY7C4421V/4201V/4211V/4221V
t
ENS
PAF OFFSET
t
SKEW2
FULL
LSB
CY7C4231V/4241V/4251V
IN FIFO
t
[21]
ENS
M WORDS
t
[20]
ENH
PAF OFFSET
MSB
t
PAF
42X1V–13
42X1V–14

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