CY7C1412KV18-300BZXI Cypress Semiconductor Corp, CY7C1412KV18-300BZXI Datasheet - Page 12

• Manufacturer Part Number: CY7C1412KV18-300BZXI
• Description: CY7C1412KV18-300BZXI
• Manufacturer: Cypress Semiconductor Corp
• Series: -r

Specifications of CY7C1412KV18-300BZXI

• Format - Memory: RAM
• Memory Type: SRAM - Synchronous, QDR II
• Memory Size: 36M (2M x 18)
• Speed: 300MHz
• Interface: Parallel
• Voltage - Supply: 1.7 V ~ 1.9 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 165-LFBGA
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Write Cycle Descriptions
The write cycle description table for CY7C1425KV18 follow.
Write Cycle Descriptions
The write cycle description table for CY7C1414KV18 follow.
Document Number: 001-57825 Rev. *D
Notes
BWS
BWS
9. X = “Don't Care,” H = Logic HIGH, L = Logic LOW,
10. Is based on a write cycle that was initiated in accordance with the
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
different portions of a write cycle, as long as the setup and hold requirements are achieved.
0
0
BWS
L–H
L–H
K
H
H
H
H
H
H
H
H
–
–
L
L
L
L
1
BWS
L–H
L–H
K
H
H
H
H
H
H
H
H
–
–
L
L
L
L
2
During the data portion of a write sequence, the single byte (D
During the data portion of a write sequence, the single byte (D
No data is written into the device during this portion of a write operation.
No data is written into the device during this portion of a write operation.
BWS
H
H
H
H
H
H
H
H
L
L
L
L
3
L–H
L–H
L–H
L–H
L–H
L–H
K
–
–
–
–
–
–

L–H During the data portion of a write sequence, all four bytes (D
L–H During the data portion of a write sequence, only the lower byte (D
L–H During the data portion of a write sequence, only the byte (D
L–H During the data portion of a write sequence, only the byte (D
L–H During the data portion of a write sequence, only the byte (D
L–H No data is written into the device during this portion of a write operation.
represents rising edge.
K
–
–
–
–
–
–
During the data portion of a write sequence, all four bytes (D
the device.
the device.
During the data portion of a write sequence, only the lower byte (D
into the device. D
into the device. D
During the data portion of a write sequence, only the byte (D
the device. D
the device. D
During the data portion of a write sequence, only the byte (D
the device. D
the device. D
During the data portion of a write sequence, only the byte (D
the device. D
the device. D
No data is written into the device during this portion of a write operation.
Write Cycle Descriptions
[9, 10]
[9, 10]
[8:0]
[8:0]
[17:0]
[17:0]
[26:0]
[26:0]
and D
and D
[35:9]
[35:9]
and D
and D
remains unaltered.
remains unaltered.
remains unaltered.
remains unaltered.
[35:18]
[35:18]
[35:27]
[35:27]
table. NWS
CY7C1410KV18, CY7C1425KV18
CY7C1412KV18, CY7C1414KV18
remains unaltered.
remains unaltered.
remains unaltered.
remains unaltered.
0
, NWS
Comments
1
[8:0]
[8:0]
, BWS
) is written into the device.
) is written into the device.
0
, BWS
1
, BWS
2
, and BWS
[35:0]
[35:0]
[26:18]
[26:18]
[35:27]
[35:27]
[17:9]
[17:9]
) are written into
) are written into
) is written into
) is written into
) is written into
) is written into
) is written into
) is written into
3
[8:0]
[8:0]
can be altered on
Page 12 of 32
) is written
) is written
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