AD7294BSUZ Analog Devices Inc, AD7294BSUZ Datasheet - Page 25

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AD7294BSUZ

Manufacturer Part Number
AD7294BSUZ
Description
IC ADC 12BIT W/DAC/TEMP 64TQFP
Manufacturer
Analog Devices Inc
Type
ADC, DACr
Datasheet

Specifications of AD7294BSUZ

Resolution (bits)
12 b
Data Interface
Serial
Sampling Rate (per Second)
22.22k
Voltage Supply Source
Analog and Digital
Voltage - Supply
4.5 V ~ 5.5 V
Operating Temperature
-55°C ~ 150°C
Mounting Type
Surface Mount
Package / Case
64-TQFP, 64-VQFP
Sampling Rate
22.22kSPS
Input Channel Type
Differential, Single Ended
Supply Voltage Range - Digital
4.5V To 5.5V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Series Resistance Cancellation
The AD7294 has been designed to automatically cancel out the
effect of parasitic, base, and collector resistance on the tempera-
ture reading. This gives a more accurate result, without the need
for any user characterization of the parasitic resistance. The
AD7294 can compensate for up to 100 Ω in a process that is
transparent to the user.
DAC OPERATION
The AD7294 contains four 12-bit DACs that provide digital
control with 12 bits of resolution with a 2.5 V internal reference.
The DAC core is a thin film 12-bit string DAC with a 5 V output
span and an output buffer that can drive the high voltage output
stage. The DAC has a span of 0 V to 5 V with a 2.5 V reference
input. The output range of the DAC, which is controlled by the
offset input, can be positioned from 0 V to 15 V. Figure 47 is a
block diagram of the DAC architecture.
Resistor String
The resistor string structure is shown in Figure 48. It consists of
a string of 2
DAC register determines at which node on the string the voltage
is tapped off to be fed into the output amplifier. The voltage is
tapped off by closing one of the switches connecting the string
to the amplifier. This architecture is inherently monotonic,
voltage out, and low glitch. It is also linear because all of the
resistors are of equal value.
REF
REF
IN
DAC
OUT
/
n
DATA INPUTS
resistors, each of Value R. The code loaded to the
REFERENCE
12-BIT
CAPACITOR
DAC
EXTERNAL
I
2
C
Figure 47. DAC Architecture
A1
5V
V
100kΩ
DAC
R1
HIGH-Z
DAC
100kΩ
R1
200kΩ
R2
200kΩ
R2
A2
AGND
15V
OFFSET IN x
DAC OUT V+ xx
(POWER DOWN
REGISTER = 0)
Rev. F | Page 25 of 48
Output Amplifier
Referring to Figure 47, the purpose of A1 is to buffer the DAC
output range from 0 V to V
configured such that when an offset is applied to OFFSET IN x,
its output voltage is three times the offset voltage minus twice
the DAC voltage.
The DAC word is digitally inverted on-chip such that
where:
V
D is the decimal equivalent of the binary code that is loaded to the
DAC register.
n is the bit resolution of the DAC.
An example of the offset function is given in Table 8.
Table 8. Offset Voltage Function Example
Offset
Voltage
1.67 V
3.33 V
5.00 V
The user has the option of leaving the offset pin open, in which
case the voltage on the noninverting input of Op Amp A2 is set
by the resistor divider, giving
DAC
V
V
and V
V
is the output of the DAC before digital inversion.
OUT
OUT
OUT
= 3V
= 3V
= 2V
DAC
=
R
R
R
R
R
OFFSET
OFFSET
DAC
V
0 V
5 V
10 V
V
OUT
Figure 48. Resistor String Structure
REF
− 2V
+ 2(V
with 0x000
 ×
DAC
2
D
DAC
n
REF
− V
. The second amplifier, A2, is
REF
)
TO OUTPUT
AMPLIFIER
V
5 V − 1 LSB
10 V − 1 LSB
15 V − 1 LSB
OUT
with 0xFFF
AD7294

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