AD7982BRMZ Analog Devices Inc, AD7982BRMZ Datasheet - Page 5

• Manufacturer Part Number: AD7982BRMZ
• Description: IC ADC 18BIT 1MSPS PULSAR 10MSOP
• Manufacturer: Analog Devices Inc
• Series: PulSAR®r

Specifications of AD7982BRMZ

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Design Resources: Converting a Single-Ended Signal with AD7982 Differential PulSAR ADC (CN0032) Precision Single-Supply Differential ADC Driver for Industrial-Level Signals (CN0180)
• Number Of Bits: 18
• Sampling Rate (per Second): 1M
• Number Of Converters: 1
• Power Dissipation (max): 8.6mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 10-TFSOP (0.118", 3.00mm Width)
• Resolution (bits): 18bit
• Sampling Rate: 1MSPS
• Input Channel Type: Differential
• Supply Voltage Range - Analog: 2.375V To 2.625V
• Supply Current: 350nA
• Package: 10MSOP
• Resolution: 18 Bit
• Architecture: SAR
• Number Of Analog Inputs: 1
• Digital Interface Type: Serial (3-Wire, 4-Wire, SPI, QSPI, Microwire)
• Input Type: Voltage
• Signal To Noise Ratio: 98(Typ) dB
• Polarity Of Input Voltage: Bipolar
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

TIMING SPECIFICATIONS
T
Table 4.
Parameter
Conversion Time: CNV Rising Edge to Data Available
Acquisition Time
Time Between Conversions
CNV Pulse Width (CS Mode)
SCK Period (CS Mode)
SCK Period (Chain Mode)
SCK Low Time
SCK High Time
SCK Falling Edge to Data Remains Valid
SCK Falling Edge to Data Valid Delay
CNV or SDI Low to SDO D15 MSB Valid (CS Mode)
CNV or SDI High or Last SCK Falling Edge to SDO High Impedance (CS Mode)
SDI Valid Setup Time from CNV Rising Edge
SDI Valid Hold Time from CNV Rising Edge (CS Mode)
SDI Valid Hold Time from CNV Rising Edge (Chain Mode)
SCK Valid Setup Time from CNV Rising Edge (Chain Mode)
SCK Valid Hold Time from CNV Rising Edge (Chain Mode)
SDI Valid Setup Time from SCK Falling Edge (Chain Mode)
SDI Valid Hold Time from SCK Falling Edge (Chain Mode)
SDI High to SDO High (Chain Mode with Busy Indicator)
1
See Figure 2 and Figure 3 for load conditions.
A
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 4.5 V
VIO Above 3 V
VIO Above 2.7 V
VIO Above 2.3 V
VIO Above 3 V
VIO Above 2.3 V
= −40°C to +85°C, VDD = 2.37 V to 2.63 V, VIO = 2.3 V to 5.5 V, unless otherwise noted.
Figure 2. Load Circuit for Digital Interface Timing
TO SDO
20pF
C
L
500µA
500µA
I
I
OL
OH
1.4V
Rev. A | Page 5 of 24
1
2
FOR VIO ≤ 3.0V, X = 90, AND Y = 10; FOR VIO > 3.0V, X = 70, AND Y = 30.
MINIMUM V
SPECIFICATIONS IN TABLE 3.
X% VIO
t
DELAY
1
IH
AND MAXIMUM V
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CONV
ACQ
CYC
CNVH
SCK
SCK
SCKL
SCKH
HSDO
DSDO
EN
DIS
SSDICNV
HSDICNV
HSDICNV
SSCKCNV
HSCKCNV
SSDISCK
HSDISCK
DSDOSDI
Figure 3. Voltage Levels for Timing
1
V
V
IH
IL
2
2
IL
Min
500
290
1000
10
10.5
12
13
15
11.5
13
14
16
4.5
4.5
3
5
2
0
5
5
2
3
USED. SEE DIGITAL INPUTS
Y% VIO
Typ
t
1
DELAY
V
V
IH
IL
2
2
Max
710
9.5
11
12
14
10
15
20
15
AD7982
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns