AD7982BRMZ Analog Devices Inc, AD7982BRMZ Datasheet - Page 23

IC ADC 18BIT 1MSPS PULSAR 10MSOP

AD7982BRMZ

Manufacturer Part Number
AD7982BRMZ
Description
IC ADC 18BIT 1MSPS PULSAR 10MSOP
Manufacturer
Analog Devices Inc
Series
PulSAR®r
Datasheet

Specifications of AD7982BRMZ

Data Interface
DSP, MICROWIRE™, QSPI™, Serial, SPI™
Design Resources
Converting a Single-Ended Signal with AD7982 Differential PulSAR ADC (CN0032) Precision Single-Supply Differential ADC Driver for Industrial-Level Signals (CN0180)
Number Of Bits
18
Sampling Rate (per Second)
1M
Number Of Converters
1
Power Dissipation (max)
8.6mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
10-TFSOP (0.118", 3.00mm Width)
Resolution (bits)
18bit
Sampling Rate
1MSPS
Input Channel Type
Differential
Supply Voltage Range - Analog
2.375V To 2.625V
Supply Current
350nA
Package
10MSOP
Resolution
18 Bit
Architecture
SAR
Number Of Analog Inputs
1
Digital Interface Type
Serial (3-Wire, 4-Wire, SPI, QSPI, Microwire)
Input Type
Voltage
Signal To Noise Ratio
98(Typ) dB
Polarity Of Input Voltage
Bipolar
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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AD7982
APPLICATION HINTS
LAYOUT
AD7982
The printed circuit board that houses the AD7982 should be
designed so that the analog and digital sections are separated
and confined to certain areas of the board. The pinout of the
AD7982, with its analog signals on the left side and its digital
signals on the right side, eases this task.
Avoid running digital lines under the device because these
couple noise onto the die, unless a ground plane under the
AD7982 is used as a shield. Fast switching signals, such as CNV
or clocks, should not run near analog signal paths. Crossover of
digital and analog signals should be avoided.
At least one ground plane should be used. It can be common or
split between the digital and analog sections. In the latter case,
the planes should be joined underneath the AD7982s.
Figure 41. Example Layout of the AD7982 (Top Layer)
The AD7982 voltage reference input REF has a dynamic input
impedance and should be decoupled with minimal parasitic
inductances. This is done by placing the reference decoupling
ceramic capacitor close to, ideally right up against, the REF and
GND pins and connecting them with wide, low impedance traces.
Finally, the power supplies VDD and VIO of the AD7982
should be decoupled with ceramic capacitors, typically 100 nF,
placed close to the AD7982 and connected using short, wide
traces to provide low impedance paths and to reduce the effect
of glitches on the power supply lines.
An example of layout following these rules is shown in
Figure 41 and Figure 42.
EVALUATING AD7982 PERFORMANCE
Figure 42. Example Layout of the AD7982 (Bottom Layer)
Other recommended layouts for the AD7982 are outlined
in the documentation of the evaluation board for the AD7982
(EVAL-AD7982CBZ). The evaluation board package includes
a fully assembled and tested evaluation board, documentation,
and software for controlling the board from a PC via the
EVAL-CONTROL
BRD3.
Rev. A | Page 23 of 24

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