AD7710ANZ Analog Devices Inc, AD7710ANZ Datasheet - Page 12

• Manufacturer Part Number: AD7710ANZ
• Description: IC ADC SIGNAL CONDITIONING 24DIP
• Manufacturer: Analog Devices Inc

Specifications of AD7710ANZ

• Data Interface: Serial
• Number Of Bits: 24
• Sampling Rate (per Second): 1.03k
• Number Of Converters: 1
• Power Dissipation (max): 45mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Through Hole
• Package / Case: 24-DIP (0.300", 7.62mm)
• Resolution (bits): 24bit
• Sampling Rate: 1.02kSPS
• Input Channel Type: Single Ended
• Supply Voltage Range - Digital: 4.75V To 5.25V
• Supply Current: 4.5mA
• Digital Ic Case Style: DIP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD7710
Figure 2 show information similar to that outlined in Table I. In this plot, however, the output rms noise is shown for the full range
of available cutoffs frequencies. The numbers given in these plots are typical values at 25 C.
CIRCUIT DESCRIPTION
The AD7710 is a sigma-delta A/D converter with on-chip digital
filtering for measuring wide dynamic range, low frequency sig-
nals in applications such as weigh scale, industrial control, or
process control. It contains a sigma-delta (or charge-balancing)
ADC, a calibration microcontroller with on-chip static RAM, a
clock oscillator, a digital filter, and a bidirectional serial commu-
nications port.
The part contains two programmable gain differential analog
input channels. The gain range is from 1 to 128 allowing the
part to accept unipolar signals of 0 mV to 20 mV and 0 V to
2.5 V, or bipolar signals in the range of 20 mV to 2.5 V when
the reference input voltage equals 2.5 V. The input signal to the
selected analog input channel is continuously sampled at a rate
determined by the frequency of the master clock, MCLK IN,
and the selected gain (see Table III). A charge-balancing A/D
converter (sigma-delta modulator) converts the sampled signal
into a digital pulse train whose duty cycle contains the digital
information. The programmable gain function on the analog
input is also incorporated in this sigma-delta modulator with the
input sampling frequency being modified to give the higher
gains. A sinc
sigma-delta modulator and updates the output register at a rate
determined by the first notch frequency of the filter. The output
data can be read from the serial port randomly or periodically at
any rate up to the output register update rate. The first notch of
this digital filter (and therefore its –3 dB frequency) can be
programmed via an on-chip control register. The programmable
range for this first notch frequency is 9.76 Hz to 1.028 kHz,
giving a programmable range for the –3 dB frequency of 2.58 Hz
to 269 Hz.
10k
100
0.1
1k
10
Figure 2a. Output Noise vs. Gain and Notch
Frequency (Gains of 1 to 8)
1
10
3
digital low-pass filter processes the output of the
NOTCH FREQUENCY – Hz
100
1k
GAIN OF 1
GAIN OF 4
GAIN OF 2
GAIN OF 8
10k
–12–
The basic connection diagram for the part is shown in Figure 3.
This figure shows the AD7710 in the external clocking mode
with both the AV
log 5 V supply. Some applications have separate supplies for
both AV
exceeds the 5 V digital supply (see the Power Supplies and
Grounding section).
ANALOG INPUT
ANALOG INPUT
+5V SUPPLY
DIFFERENTIAL
DIFFERENTIAL
GROUND
GROUND
ANALOG
DIGITAL
ANALOG
100
0.1
1k
10
DD
1
Figure 2b. Output Noise vs. Gain and Notch
Frequency (Gains of 16 to 128)
10
and DV
Figure 3. Basic Connection Diagram
10 F
DD
DD
and DV
0.1 F
, and in some cases, the analog supply
AIN1(+)
AGND
DGND
REF OUT
REF IN(+)
REF IN(–)
I
V
AIN1(–)
AIN2(+)
AIN2(–)
V
OUT
BIAS
SS
NOTCH FREQUENCY – Hz
100
DD
AV
AD7710
pins being driven from the ana-
DD
DV
DD
MCLK OUT
1k
MCLK IN
SDATA
GAIN OF 16
GAIN OF 32
GAIN OF 64
GAIN OF 128
MODE
DRDY
SYNC
SCLK
0.1 F
RFS
TFS
A0
+5V
TRANSMIT
(WRITE)
DATA
READY
RECEIVE
(READ)
SERIAL
DATA
SERIAL
CLOCK
ADDRESS
INPUT
10k
REV. G