AD7710ANZ Analog Devices Inc, AD7710ANZ Datasheet
AD7710ANZ
Specifications of AD7710ANZ
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AD7710ANZ Summary of contents
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FEATURES Charge Balancing ADC 24 Bits, No Missing Codes 0.0015% Nonlinearity 2-Channel Programmable Gain Front End Gains from 1 to 128 Differential Inputs Low-Pass Filter with Programmable Filter Cutoffs Ability to Read/Write Calibration Coefficients Bidirectional Microcontroller Serial Interface Internal/External ...
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AD7710–SPECIFICATIONS REF IN(–) = AGND; MCLK MHz unless otherwise noted. All specifications T Parameter STATIC PERFORMANCE No Missing Codes Output Noise Integral Nonlinearity @ + MIN MAX 2, 3 Positive Full-Scale Error 5 ...
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Parameter REFERENCE OUTPUT Output Voltage Initial Tolerance @ 25 C Drift Output Noise Line Regulation ( Load Regulation External Current 12 V INPUT BIAS Input Voltage Range V Rejection BIAS LOGIC INPUTS Input Current All Inputs Except MCLK ...
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AD7710–SPECIFICATIONS Parameter POWER REQUIREMENTS Power Supply Voltages 16 AV Voltage Voltage Voltage DD SS Power Supply Currents AV Current DD DV Current DD V Current SS 18 Power Supply Rejection Positive Supply (AV and ...
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TIMING CHARACTERISTICS Limit at T MIN Parameter (A, S Versions CLK IN 400 0.4 t CLK IN LO CLK IN t 0.4 t CLK IN HI CLK ...
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AD7710 Limit at T Parameter (A, S Versions) External Clocking Mode SCLK CLK CLK CLK IN 7 ...
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Pin Mnemonic Function 1 SCLK Serial Clock. Logic input/output, depending on the status of the MODE pin. When MODE is high, the device is in its self-clocking mode, and the SCLK pin provides a serial clock output. This SCLK becomes ...
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AD7710 Pin Mnemonic Function TFS 19 Transmit Frame Synchronization. Active low logic input used to write serial data to the device with serial data expected after the falling edge of this pulse. In the self-clocking mode, the serial clock becomes ...
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CONTROL REGISTER (24 BITS) A write to the device with the A0 input low writes data to the control register. A read to the device with the A0 input low accesses the contents of the control register. The control register ...
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AD7710 PGA GAIN Gain (Default Condition after the Internal Power-On Reset ...
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Tables I and II show the output rms noise for some typical notch and –3 dB frequencies. The numbers given are for the bipolar input ranges with 2.5 V. These numbers are REF typical and are generated ...
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AD7710 Figure 2 show information similar to that outlined in Table I. In this plot, however, the output rms noise is shown for the full range of available cutoffs frequencies. The numbers given in these plots are typical values at ...
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The AD7710 provides a number of calibration options that can be programmed via the on-chip control register. A calibration cycle may be initiated at any time by writing to this control register. The part can perform self-calibration using the on-chip ...
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AD7710 Input Sample Rate The modulator sample frequency for the device remains at f /512 (19.5 kHz @ MHz) regardless of the CLK IN CLK IN selected gain. However, gains greater than 1 are achieved by a ...
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Antialias Considerations The digital filter does not provide any rejection at integer mul- tiples of the modulator sample frequency (n 19.5 kHz, where This means that there are frequency bands f ...
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AD7710 Bipolar/Unipolar Inputs The two analog inputs on the AD7710 can accept either unipo- lar or bipolar input voltage ranges. Bipolar or unipolar options are chosen by programming the B/U bit of the control register. This programs both channels for ...
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USING THE AD7710 SYSTEM DESIGN CONSIDERATIONS The AD7710 operates differently from successive approxima- tion ADCs or integrating ADCs. Because it samples the signal continuously, like a tracking ADC, there is no need for a start convert command. The output register ...
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AD7710 performed; the V node is then switched in and another conver- REF sion is performed. When the calibration sequence is complete, the calibration coefficients updated, and the filter resettled to the ana- log input voltage, the DRDY output goes ...
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Span and Offset Limits Whenever a system calibration mode is used, there are limits on the amount of offset and span that can be accommodated. The range of input span in both the unipolar and bipolar modes has a minimum ...
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AD7710 Read Operation Data can be read from either the output register, the control register, or the calibration registers. A0 determines whether the data read accesses data from the control register or from the output/calibration registers. This A0 signal must ...
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Write Operation Data can be written to either the control register or calibration registers. In either case, the write operation is not affected by the DRDY line and does not have any effect on the status of DRDY. A write ...
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AD7710 Figures 12a and 12b show timing diagrams for reading from the AD7710 in external clocking mode. In Figure 12a, all the data is read from the AD7710 in one read operation. In Figure 12b, the data is read from ...
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Write Operation Data can be written to either the control register or calibration registers. In either case, the write operation is not affected by the DRDY line and does not have any effect on the status of DRDY. A write ...
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AD7710 SIMPLIFYING THE EXTERNAL CLOCKING MODE INTERFACE In many applications, the user may not need to write to the on-chip calibration registers. In this case, the serial interface to the AD7710 in external clocking mode can be simplified by connecting ...
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START CONFIGURE AND INITIALIZE C/ P SERIAL PORT BRING RFS, TFS, AND A0 HIGH LOAD DATA FROM ADDRESS TO ACCUMULATOR REVERSE ORDER OF BITS BRING TFS AND A0 LOW WRITE DATA FROM ACCUMULATOR TO SERIAL BUFFER BRING TFS AND A0 ...
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AD7710 Table VIII. 8XC51 Code for Writing to the AD7710 MOV SCON,#00000000B; Configure 8051 for MODE 0 Operation and Enable Serial Reception MOV IE,#10010000B; Enable Transmit Interrupt MOV IP,#00010000B; Prioritize the Transmit Interrupt Bring TFS High SETB 91H; Bring TFS ...
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APPLICATIONS Figure 19 shows a strain gage interfaced directly to one of the analog input channels of the AD7710. The differential inputs to the AD7710 are connected directly to the bridge network of the strain gage. In the diagram shown, ...
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AD7710 0.150 (3.81) 0.130 (3.30) 0.110 (2.79) 0.005 (0.13) MIN 0.200 (5.08) MAX 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) OUTLINE DIMENSIONS 24-Lead Plastic Dual In-Line Package [PDIP] (N-24) Dimensions shown in inches and (millimeters) 1.185 (30.01) 0.295 (7.49) ...
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COPLANARITY 0.10 REV. G OUTLINE DIMENSIONS 24-Lead Standard Small Outline Package [SOIC] Wide Body (R-24) Dimensions shown in millimeters and (inches) 15.60 (0.6142) 15.20 (0.5984 7.60 (0.2992) 7.40 (0.2913) 10.65 (0.4193 10.00 ...
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AD7710 Revision History Location 3/04—Data Sheet changed from REV REV. G. Changes to SPECIFICATIONS Note ...
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AM_MB –31– ...
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–32– ...