AD7656YSTZ Analog Devices Inc, AD7656YSTZ Datasheet - Page 11

IC ADC 16BIT 6CH 250KSPS 64LQFP

AD7656YSTZ

Manufacturer Part Number
AD7656YSTZ
Description
IC ADC 16BIT 6CH 250KSPS 64LQFP
Manufacturer
Analog Devices Inc
Datasheet

Specifications of AD7656YSTZ

Data Interface
Serial, Parallel
Number Of Bits
16
Sampling Rate (per Second)
250k
Number Of Converters
6
Power Dissipation (max)
143mW
Voltage Supply Source
Analog and Digital, Dual ±
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
64-LQFP
Resolution (bits)
16bit
Sampling Rate
250kSPS
Input Channel Type
Single Ended
Supply Voltage Range - Digital
4.75V To 5.25V
Supply Current
26mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
EVAL-AD7656-1EDZ - BOARD EVAL CONTROL AD7656-1EVAL-AD7656-1CBZ - BOARD EVAL FOR AD7656-1EVAL-AD7656CBZ - BOARD EVAL FOR AD7656
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Manufacturer
Quantity
Price
Part Number:
AD7656YSTZ
Manufacturer:
Analog Devices Inc
Quantity:
10 000
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Manufacturer:
ADI
Quantity:
114
Part Number:
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Manufacturer:
Analog Devices Inc
Quantity:
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Part Number:
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Quantity:
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PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Table 7. Pin Function Descriptions
Pin No.
54, 56, 58
33, 36, 39,
42, 45, 48
32, 37, 38, 43,
44, 49, 52, 53,
55, 57, 59
26
9
8, 25
34, 35, 40,
41, 46, 47,
50, 60
23, 22, 21
Mnemonic
REFCAPA, REFCAPB,
REFCAPC
V1 to V6
AGND
DV
V
DGND
AV
CONVST A,
CONVST B, CONVST C
DRIVE
CC
CC
DB14/REFBUF
DB7/HBEN/DCEN
DB10/DOUT C
DB9/DOUT B
DB8/DOUT A
DB5/DCIN A
DB4/DCIN B
DB3/DCIN C
DB2/SEL C
DB1/SEL B
DB6/SCLK
Description
Decoupling capacitors are connected to these pins. This decouples the reference buffer for each
ADC pair. Each REFCAP pin should be decoupled to AGND using 10 μF and 100 nF capacitors.
Analog Input 1 to 6. These are six single-ended analog inputs. In hardware mode, the analog input
range on these channels is determined by the RANGE pin. In software mode, it is determined by Bit
RNGC to Bit RNGA of the control register (see Table 10).
Analog Ground. Ground reference point for all analog circuitry on the AD7656/AD7657/AD7658.
All analog input signals and any external reference signal should be referred to this AGND voltage.
All 11 of these AGND pins should be connected to the AGND plane of a system. The AGND and
DGND voltages should ideally be at the same potential and must not be more than 0.3 V apart,
even on a transient basis.
Digital Power, 4.75 V to 5.25 V. The DV
and must not be more than 0.3 V apart, even on a transient basis. This supply should be decoupled
to DGND, and 10 μF and 100 nF decoupling capacitors should be placed on the DV
Logic Power Supply Input. The voltage supplied at this pin determines the operating voltage of the
interface. Nominally at the same supply as the supply of the host interface. This pin should be
decoupled to DGND, and 10 μF and 100 nF decoupling capacitors should be placed on the V
Digital Ground. This is the ground reference point for all digital circuitry on the AD7656/AD7657/AD7658.
Both DGND pins should connect to the DGND plane of a system. The DGND and AGND voltages should
ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis.
Analog Supply Voltage, 4.75 V to 5.25 V. This is the supply voltage for the ADC cores. The AV
DV
on a transient basis. These supply pins should be decoupled to AGND, and 10 μF and 100 nF
decoupling capacitors should be placed on the AV
Conversion Start Input A, B, C. These logic inputs are used to initiate conversions on the ADC pairs.
CONVST A is used to initiate simultaneous conversions on V1 and V2. CONVST B is used to initiate
simultaneous conversions on V3 and V4. CONVST C is used to initiate simultaneous conversions on
V5 and V6. When CONVSTx switches from low to high, the track-and-hold switch on the selected
ADC pair switches from track to hold and the conversion is initiated. These inputs can also be used
to place the ADC pairs into partial power-down mode.
V
CC
DGND
EN/DIS
DB13
DB12
DB11
DRIVE
voltages should ideally be at the same potential and must not be more than 0.3 V apart, even
10
11
12
13
14
15
16
1
3
9
2
4
5
6
7
8
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
PIN 1
Figure 3. Pin Configuration
Rev. A | Page 11 of 32
AD7656/AD7657/AD7658
(Not to Scale)
TOP VIEW
CC
and AV
CC
voltages should ideally be at the same potential
CC
pins.
48
46
40
47
45
44
43
42
41
39
38
37
36
35
34
33
AD7656/AD7657/AD7658
V6
AV
AV
V5
AGND
AGND
V4
AV
AV
V3
AGND
AGND
V2
AV
AV
V1
CC
CC
CC
CC
CC
CC
CC
pin.
DRIVE
CC
and
pin.

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