LTC2206IUK-14#PBF Linear Technology, LTC2206IUK-14#PBF Datasheet - Page 23

• Manufacturer Part Number: LTC2206IUK-14#PBF
• Description: IC ADC 14BIT 80MSPS 48-QFN
• Manufacturer: Linear Technology

Specifications of LTC2206IUK-14#PBF

• Number Of Bits: 14
• Sampling Rate (per Second): 80M
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 875mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-WFQFN, Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
DIGITAL OUTPUTS
Digital Output Buffers
Figure 11 shows an equivalent circuit for a single output
buffer. Each buffer is powered by OV
from the ADC power and ground. The additional N-channel
transistor in the output driver allows operation down to
low voltages. The internal resistor in series with the output
eliminates the need for external damping resistors.
As with all high speed/high resolution converters, the
digital output loading can affect the performance. The
digital outputs of the LTC2207-14/LTC2206-14 should drive
a minimum capacitive load to avoid possible interaction
between the digital outputs and sensitive input circuitry.
The output should be buffered with a device such as a
ALVCH16373 CMOS latch. For full speed operation the
capacitive load should be kept under 10pF . A resistor in
series with the output may be used but is not required since
the output buffer has a series resistor of 33Ω on chip.
Lower OV
from the digital outputs.
Data Format
The LTC2207-14/LTC2206-14 parallel digital output can
be selected for offset binary or 2’s complement format.
The format is selected with the MODE pin. This pin has a
four level logic input, centered at 0, 1/3V
V
1/3V
states for the MODE pin.
DD
. An external resistor divider can be used to set the
Figure 11. Equivalent Circuit for a Digital Output Buffer
DD
LATCH
FROM
DATA
and 2/3V
DD
PREDRIVER
LOGIC
voltages will also help reduce interference
V
DD
DD
logic levels. Table 1 shows the logic
V
DD
LTC2207-14/LTC2206-14
DD
OV
and OGND, isolated
DD
2207614 F11
33Ω
DD
, 2/3V
OV
OGND
DD
TYPICAL
DATA
OUTPUT
0.1μF
0.5V
TO 3.6V
DD
and
Table 1. MODE Pin Function
Overfl ow Bit
An overfl ow output bit (OF) indicates when the converter
is over-ranged or under-ranged. A logic high on the OF
pin indicates an overfl ow or underfl ow.
Output Clock
The ADC has a delayed version of the encode input available
as a digital output. Both a noninverted version, CLKOUT+
and an inverted version CLKOUT– are provided. The
CLKOUT+/CLKOUT– can be used to synchronize the
RAND = HIGH,
Figure 12. Functional Equivalent of Digital Output Randomizer
SCRAMBLE
0(GND)
1/3V
2/3V
MODE
ENABLED
V
DD
DD
DD
LTC2207-14/LTC2206-14
OUTPUT FORMAT
RAND
D0
2’s Complement
2’s Complement
LTC2207-14/LTC2206-14
Offset Binary
Offset Binary
CLKOUT
D13
D12
OF
D2
D1
CLOCK DUTY CYCLE STABILIZER
•
•
•
2207614 F12
Off
On
On
Off
220714614fc
23
CLKOUT
OF
D13/D0
D12/D0
D2/D0
D1/D0
D0
+