LTC2206IUK#TRPBF Linear Technology, LTC2206IUK#TRPBF Datasheet - Page 23

IC ADC 16-BIT 80MSPS 48-QFN

LTC2206IUK#TRPBF

Manufacturer Part Number
LTC2206IUK#TRPBF
Description
IC ADC 16-BIT 80MSPS 48-QFN
Manufacturer
Linear Technology
Datasheet

Specifications of LTC2206IUK#TRPBF

Number Of Bits
16
Sampling Rate (per Second)
80M
Data Interface
Parallel
Number Of Converters
1
Power Dissipation (max)
875mW
Voltage Supply Source
Single Supply
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-WFQFN, Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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APPLICATIONS INFORMATION
DIGITAL OUTPUTS
Digital Output Buffers
Figure 11 shows an equivalent circuit for a single output
buffer. Each buffer is powered by OV
from the ADC power and ground. The additional N-channel
transistor in the output driver allows operation down to
low voltages. The internal resistor in series with the output
eliminates the need for external damping resistors.
As with all high speed/high resolution converters, the digi-
tal output loading can affect the performance. The digital
outputs of the LTC2207/LTC2206 should drive a minimum
capacitive load to avoid possible interaction between the
digital outputs and sensitive input circuitry. The output
should be buffered with a device such as a ALVCH16373
CMOS latch. For full speed operation the capacitive load
should be kept under 10pF . A resistor in series with the
output may be used but is not required since the output
buffer has a series resistor of 33Ω on chip.
Lower OV
from the digital outputs.
Data Format
The LTC2207/LTC2206 parallel digital output can be
selected for offset binary or 2’s complement format. The
format is selected with the MODE pin. This pin has a four
level logic input, centered at 0, 1/3V
An external resistor divider can be user to set the 1/3V
and 2/3V
for the MODE pin.
LATCH
FROM
Figure 11. Equivalent Circuit for a Digital Output Buffer
DATA
DD
PREDRIVER
DD
LOGIC
V
logic levels. Table 1 shows the logic states
DD
voltages will also help reduce interference
V
DD
LTC2207/LTC2206
DD
OV
DD
DD
and OGND, isolated
, 2/3V
33Ω
22076 F11
OV
OGND
DD
DD
TYPICAL
DATA
OUTPUT
0.5V
TO 3.6V
0.1μF
and V
DD
DD
.
Table 1. MODE Pin Function
Overfl ow Bit
An overfl ow output bit (OF) indicates when the converter
is over-ranged or under-ranged. A logic high on the OF
pin indicates an overfl ow or underfl ow.
Output Clock
The ADC has a delayed version of the encode input available
as a digital output. Both a noninverted version, CLKOUT+
and an inverted version CLKOUT– are provided. The
CLKOUT+/CLKOUT– can be used to synchronize the con-
verter data to the digital system. This is necessary when
using a sinusoidal encode. Data can be latched on the
rising edge of CLKOUT+ or the falling edge of CLKOUT–.
CLKOUT+ falls and CLKOUT– rises as the data outputs
are updated.
Figure 12. Functional Equivalent of Digital Output Randomizer
RAND = HIGH,
SCRAMBLE
0(GND)
1/3V
2/3V
MODE
ENABLED
V
DD
DD
DD
RAND
D0
LTC2207/LTC2206
LTC2207/LTC2206
CLKOUT
2’s Complement
2’s Complement
Output Format
Offset Binary
Offset Binary
D15
D14
OF
D2
D1
22076 F12
Cycle Stabilizer
Clock Duty
Off
Off
On
On
CLKOUT
OF
D15/D0
D14/D0
D2/D0
D1/D0
D0
23
+
22076fc

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