LTC2420IS8#PBF Linear Technology, LTC2420IS8#PBF Datasheet - Page 29

• Manufacturer Part Number: LTC2420IS8#PBF
• Description: IC ADC 20BIT MICRPWR W/OSC 8SOIC
• Manufacturer: Linear Technology

Specifications of LTC2420IS8#PBF

• Number Of Bits: 20
• Sampling Rate (per Second): 7.5
• Data Interface: MICROWIRE™, Serial, SPI™
• Number Of Converters: 2
• Power Dissipation (max): 1mW
• Voltage Supply Source: Single Supply
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SYNCHRONIZATION OF MULTIPLE LTC2420s
Since the LTC2420’s absolute accuracy (total unadjusted
error) is 10ppm, applications utilizing multiple matched
ADCs are possible.
Simultaneous Sampling with Two LTC2420s
One such application is synchronizing multiple LTC2420s,
see Figure 35. The start of conversion is synchronized to
the rising edge of CS. In order to synchronize multiple
LTC2420s, CS is a common input to all the ADCs.
To prevent the converters from autostarting a new con-
version at the end of data output read, 23 or fewer SCK
clock signals are applied to the LTC2420 instead of 24 (the
24th falling edge would start a conversion). The exact
timing and frequency for the SCK signal is not critical
since it is only shifting out the data. In this case, two
LTC2420’s simultaneously start and end their conversion
cycles under the external control of CS.
TYPICAL APPLICATIO S
SDO1
SDO2
SCK1
SCK2
CS
U
CONTROLLER
Figure 35. Synchronous Conversion—Extendable
23 OR LESS CLOCK CYCLES
SDO1
SDO2
SCK2
SCK1
CS
V
V
V
GND
CC
REF
IN
LTC2420
#1
SDO
SCK
CS
F
O
Increasing the Output Rate Using Multiple LTC2420s
A second application uses multiple LTC2420s to increase
the effective output rate by 4 , see Figure 36. In this case,
four LTC2420s are interleaved under the control of sepa-
rate CS signals. This increases the effective output rate
from 7.5Hz to 30Hz (up to a maximum of 400Hz). Addi-
tionally, the one-shot output spectrum is unfolded allow-
ing further digital signal processing of the conversion
results. SCK and SDO may be common to all four LTC2420s.
The four CS rising edges equally divide one LTC2420
conversion cycle (7.5Hz for 60Hz notch frequency). In
order to synchronize the start of conversion to CS, 23 or
less SCK clock pulses must be applied to each ADC.
Both the synchronous and 4 output rate applications use
the external serial clock and single cycle operation with
reduced data output length (see Serial Interface Timing
Modes section and Figure 7). An external oscillator clock
is applied commonly to the F
order to synchronize the sampling times. Both circuits
may be extended to include more LTC2420s.
23 OR LESS CLOCK CYCLES
V
V
V
GND
CC
REF
IN
LTC2420
#2
SDO
SCK
CS
F
O
EXTERNAL OSCILLATOR
(153,600HZ)
V
(0.1V TO V
O
REF
pin of each LTC2420 in
CC
)
LTC2420
2420 F35
29