LTC1277CSW Linear Technology, LTC1277CSW Datasheet - Page 13

• Manufacturer Part Number: LTC1277CSW
• Description: IC A/D CONV 12BIT W/SHTDN 24SOIC
• Manufacturer: Linear Technology

Specifications of LTC1277CSW

• Number Of Bits: 12
• Sampling Rate (per Second): 100k
• Data Interface: Parallel
• Number Of Converters: 1
• Power Dissipation (max): 20mW
• Voltage Supply Source: Dual ±
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 24-SOIC (0.300", 7.50mm Width)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: LTC1277CS

0 TO 1.69V
A
LTC1277 A
The input capacitor for the LTC1277 is switched onto the
A
A
period. At the end of the sample phase the input capacitor
switches to the A
During the conversion the A
tively “held” by the sample-and-hold and will not affect
the conversion result. It is critical that the A
voltage be free of noise and settles completely during the
conversion.
Internal Reference
The ADCs have an on-chip, temperature compensated,
curvature corrected bandgap reference which is factory
trimmed to 2.42V. It is internally connected to the DAC and
is available at Pin 2 (LTC1274) or Pin 3 (LTC1277) to
provide up to 1mA current to an external load.
For minimum code transition noise the reference output
should be decoupled with a capacitor to filter wideband
noise from the reference (10µF tantalum in parallel with a
0.1µF ceramic).
The V
provide input span adjustment. The V
driven to at least 2.45V to prevent conflict with the internal
reference. The reference should be driven to no more than
IN BIPOLAR MODE
IN
IN
UNIPOLAR MODE
PPLICATI
±0.846V
+
+
INPUT RANGE:
input during the sample phase. The voltage on the
input must settle completely within the sample
REF
Figure 6. Driving the V
REF(OUT)
REF(OUT)
pin can be driven with a DAC or other means to
IN
IN
+
/A
IN
O
–
–
+
IN
LT1006
Input Settling
U
–
S
input and the conversion starts.
I FOR ATIO
REF
U
V
with the LT1006 Op Amp
IN
REF(OUT)
+
input voltage is effec-
≥ 2.45V
W
3Ω
REF
10µF
pin must be
A
V
AGND
IN
LTC1274
U
LTC1274/77 • F06
IN
REF
–
5V
input
3V to keep the input span within the 5V supply in unipolar
mode. In bipolar mode the reference should be driven to
no more than 5V, the positive supply voltage of the chip.
Figure 6 shows an LT1006 op amp driving the Reference
pin. In unipolar mode, the reference can be driven up to
2.95V at which point it will provide a 0V to 5V input span.
For the bipolar mode, the reference can be driven up to 5V
at which point it will provide a ±4.23V input span. Figure
7 shows a typical reference, the LT1019A-2.5 connected
to the LTC1274. This will provide an improved drift (equal
to the maximum 5ppm/°C of the LT1019A-2.5) and a
±2.115V (bipolar) or 4.231V (unipolar) full scale.
BOARD LAYOUT AND BYPASSING
Wire wrap boards are not recommended for high resolu-
tion or high speed A/D converters. To obtain the best
performance from the LTC1274/LTC1277, a printed cir-
cuit board is required. Layout for the printed circuit board
should ensure that digital and analog signal lines are
separated as much as possible. In particular, care should
be taken not to run any digital track alongside an analog
signal track or underneath the ADC. The analog input
should be screened by AGND.
High quality tantalum and ceramic bypass capacitors
should be used at the V
0V TO 4.231V (1.69V
±2.115V (±0.846 × V
IN UNIPOLAR MODE
IN BIPOLAR AND
Figure 7. Supplying a 2.5V Reference Voltage
to the LTC1274 with the LT1019A-2.5
INPUT RANGE:
REF(OUT)
REF
)
)
LT1019A-2.5
GND
LTC1274/LTC1277
V
5V
IN
DD
V
OUT
and V
REF
3Ω
pins as shown in
10µF
13
A
V
AGND
LTC1274
LTC1274/77 • F07
IN
REF
5V