AD7367BRUZ-5 Analog Devices Inc, AD7367BRUZ-5 Datasheet - Page 17

• Manufacturer Part Number: AD7367BRUZ-5
• Description: IC ADC 14BIT DUAL 500KSPS 24-TSS
• Manufacturer: Analog Devices Inc

Specifications of AD7367BRUZ-5

• Data Interface: DSP, MICROWIRE™, QSPI™, Serial, SPI™
• Design Resources: Driving the AD7366/7 Bipolar SAR ADC in Low-Distortion DC-Coupled Appls (CN0042)
• Number Of Bits: 14
• Sampling Rate (per Second): 500k
• Number Of Converters: 2
• Power Dissipation (max): 88.8mW
• Voltage Supply Source: Analog and Digital, Dual ±
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP (0.173", 4.40mm Width)
• Resolution (bits): 14bit
• Input Channel Type: Single Ended
• Supply Voltage Range - Analogue: 4.75V To 5.25V, ± 11.5V To ± 16.5V
• Supply Voltage Range - Digital: 2.7V To
• Sampling Rate: 1MSPS
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: EVAL-AD7367CBZ - BOARD EVALUATION FOR AD7367
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

ANALOG INPUTS
Each ADC in the AD7366-5/AD7367-5 has two single-ended
analog inputs. Figure 18 shows the equivalent circuit of the
analog input structure of the AD7366-5/AD7367-5. The two
diodes provide ESD protection. Care must be taken to ensure
that the analog input signals never exceed the supply rails by
more than 300 mV. Otherwise, these diodes become forward-
biased and start conducting current into the substrate. The
diodes can conduct up to 10 mA without causing irreversible
damage to the part. The resistors are lumped components made
up of the on resistance of the switches. The value of these resistors
is typically 170 Ω. Capacitor C1 can primarily be attributed to
pin capacitance while Capacitor C2 is the sampling capacitor of
the ADC. The total lumped capacitance of C1 and C2 is approxi-
mately 9 pF for the ±10 V input range and approximately 13 pF
for all other input ranges.
The AD7366-5/AD7367-5 can handle true bipolar input voltages.
The analog input can be set to one of three ranges: ±10 V, ±5 V, or
0 V to +10 V. The logic levels on Pin RANGE0 and Pin RANGE1
determine which input range is selected as outlined in Table 8.
These range bits should not be changed during the acquisition
time prior to a conversion, but can change at any other time.
Table 8. Analog Input Range Selection
RANGE0
0
1
0
1
The parts require V
analog input structures. These supplies must be greater than or
equal to ±5 V (see Table 7 for the requirements on these supplies).
The AD7366-5/AD7367-5 require a low voltage 4.75 V to 5.25 V
AV
supply for digital power, and a 2.7 V to 5.25 V V
interface power.
Channel selection is made via the ADDR pin as shown in Table 9.
The logic level on the ADDR pin is latched on the rising edge of
the BUSY signal for the next conversion, not the one in progress.
When power is first supplied to the AD7366-5/AD7367-5, the
default channel selection is V
Table 9. Channel Selection
ADDR
0
1
CC
supply to power the ADC core, a 4.75 V to 5.25 V DV
V
IN
0
Figure 18. Equivalent Analog Input Structure
RANGE1
0
0
1
1
Channels Selected
V
V
DD
A1
A2
C1
and V
, V
, V
B1
B2
V
V
DD
SS
SS
D
D
A1
dual supplies for the high voltage
and V
Range Selected
±10 V
±5 V
0 V to +10 V
Do not program
B1
.
R1
C2
DRIVE
supply for
CC
Rev. A | Page 17 of 28
TRANSFER FUNCTION
The output coding of the AD7366-5/AD7367-5 is twos comple-
ment. The designed code transitions occur at successive integer
LSB values (that is, 1 LSB, 2 LSB, and so on). The LSB size is
dependent on the analog input range selected (see Table 10).
The ideal transfer characteristic is shown in Figure 19.
Table 10. LSB Sizes for Each Analog Input Range
Input
Range
±10 V
±5 V
0 V to +10 V
Track-and-Hold
The track-and-hold on the analog input of the AD7366-5/
AD7367-5 allows the ADC to accurately convert an input sine
wave of full-scale amplitude to 12-/14-bit accuracy. The input
bandwidth of the track-and-hold is greater than the Nyquist
rate of the ADC. The AD7366-5/AD7367-5 can handle
frequencies up to 35 MHz.
The track-and-hold enters its tracking mode once the BUSY
signal goes low after the CS falling edge. The time required to
acquire an input signal depends on how quickly the sampling
capacitor is charged. With zero source impedance, 140 ns is
sufficient to acquire the signal to the 12-bit level for the AD7366-5
and the 14-bit level for the AD7367-5. The acquisition time for
the ±10 V, ±5 V, and 0 V to +10 V ranges to settle to within ±½ LSB
is typically 140 ns. The ADC goes back into hold mode on the
falling edge of CNVST .
The acquisition time required is calculated using the following
formula:
where:
C is the sampling capacitance.
R is the resistance seen by the track-and-hold amplifier looking
at the input.
R
analog input.
SOURCE
t
ACQ
should include any extra source impedance on the
= 10 × ((R
011...111
011...110
000...001
000...000
111...111
100...010
100...001
100...000
Full-Scale
Range
20 V/4096
10 V/4096
10 V/4096
–FSR/2 + 1LSB
Figure 19. Transfer Characteristic
SOURCE
AD7366-5
ANALOG INPUT
+ R) × C)
LSB Size
(mV)
4.88
2.44
2.44
0V
AD7366-5/AD7367-5
+FSR/2 – 1LSB
Full-Scale
Range
20 V/16384
10 V/16384
10 V/16384
AD7367-5
LSB Size
(mV)
1.22
0.61
0.61