PCF2123TS/1,118 NXP Semiconductors, PCF2123TS/1,118 Datasheet - Page 28

• Manufacturer Part Number: PCF2123TS/1,118
• Description: IC SPI RTC/CALENDAR 14TSSOP
• Manufacturer: NXP Semiconductors
• Type: Clock/Calendar/Alarmr

Specifications of PCF2123TS/1,118

• Package / Case: 14-TSSOP
• Time Format: HH:MM:SS (12/24 hr)
• Date Format: YY-MM-DD-dd
• Interface: SPI, 3-Wire Serial
• Voltage - Supply: 1.1 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Function: Clock/Calendar
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.1 V
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Rtc Bus Interface: Serial (3-Wire, SPI)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4534-2; 935286384118; PCF2123TS/1-T

NXP Semiconductors
PCF2123
Product data sheet
8.8.1 CLKOE pin
8.8 Clock output
A programmable square wave is available at pin CLKOUT. Operation is controlled by the
COF[2:0] bits in the register Timer_clkout. Frequencies of 32.768 kHz (default) down to
1 Hz can be generated for use as a system clock, microcontroller clock, input to a charge
pump, or for calibration of the oscillator.
Pin CLKOUT is an open-drain output and enabled at power-on. When disabled the output
is high-impedance.
The duty cycle of the selected clock is not controlled. However, due to the nature of the
clock generation, all will be 50 : 50 except the 32.768 kHz frequencies.
The STOP bit function can also affect the CLKOUT signal, depending on the selected
frequency. When the STOP bit is set logic 1, the CLKOUT pin will generate a continuous
LOW for those frequencies that can be stopped. For more details of the STOP bit function
see
Table 35.
[1]
[2]
The CLKOE pin can be used to block the CLKOUT function and force the CLKOUT pin to
a high-impedance state. The effect is the same as setting COF[2:0] = 111.
Bits COF[2:0]
000
001
010
011
100
101
110
111
Duty cycle definition: % HIGH-level time : % LOW-level time.
1 Hz clock pulses will be affected by offset correction pulses.
Section
CLKOUT frequency selection
8.11.
All information provided in this document is subject to legal disclaimers.
CLKOUT frequency (Hz) Typical duty cycle
32768
16384
8192
4096
2048
1024
1
CLKOUT = high-Z
[2]
Rev. 5 — 27 April 2011
60 : 40 to 40 : 60
50 : 50
50 : 50
50 : 50
50 : 50
50 : 50
50 : 50
-
[1]
SPI Real time clock/calendar
Effect of STOP bit
no effect
no effect
no effect
CLKOUT = LOW
CLKOUT = LOW
CLKOUT = LOW
CLKOUT = LOW
-
PCF2123
© NXP B.V. 2011. All rights reserved.
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