SI4133T-BM Silicon Laboratories Inc, SI4133T-BM Datasheet - Page 33

IC RF SYNTHESIZER DUAL 28MLP

SI4133T-BM

Manufacturer Part Number
SI4133T-BM
Description
IC RF SYNTHESIZER DUAL 28MLP
Manufacturer
Silicon Laboratories Inc
Type
Frequency Synthesizerr
Datasheets

Specifications of SI4133T-BM

Pll
Yes
Input
Clock
Output
Clock
Number Of Circuits
1
Ratio - Input:output
1:2
Differential - Input:output
No/No
Frequency - Max
1.8GHz
Divider/multiplier
Yes/No
Voltage - Supply
2.7 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Frequency-max
1.8GHz
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Register 12h. DAC Configuration (Si4201)
Name
Bit
17:11
Bit
6:4
3:2
1:0
10
9
8
7
D17 D16 D15 D14 D13 D12 D11 D10
0
0
ZERODEL[2:0]
DACCM[1:0]
DACFS[1:0]
Reserved
Reserved
Reserved
0
Name
XBUF
ZDBS
0
0
0
Program to zero.
Program to one.
Reference Buffer Power Control.
0 = Reference buffer disabled.
1 = Reference buffer automatically enabled (default).
Note: This bit should be set to 1 during normal operation. To achieve the lowest
Program to zero.
ZERODEL Band Select.
0 = Use ZERODEL[2:0] settings corresponding to DCS/PCS column
(default).
1 = Use RXBAND[1:0] to determine ZERODEL[2:0] delay setting (GSM
or DCS/PCS).
RX Output Zero Delay.
Code
000:
001:
010:
011:
100:
101:
110:
111:
Note: DAC input is forced to zero after PDN is deasserted. This feature can be
RX Output Common Mode Voltage.
00 = 1.0 V.
01 = 1.25 V (default).
10 = 1.35 V.
11 = Reserved.
RX Output Differential Full Scale Voltage.
00 = 1.0 V
01 = 2.0 V
10 = 3.5 V
11 = Reserved.
0
Si4201 power down current (I
bit in Register 11h must also be set appropriately.
used for baseband ADC offset calibration. Offsets induced on channels
due to 13 MHz harmonics are not included in the calibrated value.
PPD
PPD
PPD
1
Rev. 1.4
.
.
(default).
XBUF
D9
GSM
90 μ s
110 μ s
130 μ s
140 μ s
150 μ s
160 μ s
180 μ s
Reserved
D8
0
DCS/PCS
130 μ s
150 μ s
170 μ s
180 μ s
190 μ s
200 μ s
220 μ s
ZDBS
D7
Function
PDN1
D6
ZERODEL[2:0]
), this bit should be set to 0. The XPD1
D5
D4
(Default)
D3
DACCM[1:0]
D2
Aero
D1
DACFS[1:0]
D0
33

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