SI4133T-BM Silicon Laboratories Inc, SI4133T-BM Datasheet - Page 10

• Manufacturer Part Number: SI4133T-BM
• Description: IC RF SYNTHESIZER DUAL 28MLP
• Manufacturer: Silicon Laboratories Inc
• Type: Frequency Synthesizerr

Specifications of SI4133T-BM

• Pll: Yes
• Input: Clock
• Output: Clock
• Number Of Circuits: 1
• Ratio - Input:output: 1:2
• Differential - Input:output: No/No
• Frequency - Max: 1.8GHz
• Divider/multiplier: Yes/No
• Voltage - Supply: 2.7 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Frequency-max: 1.8GHz
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant

Table 5. Receiver Characteristics (Continued)
(V
Aero
10
Parameter
Notes:
DD
1. GSM input pins RFIGP and RFIGN. DCS input pins RFIDP and RFIDN. PCS input pins RFIPP and RFIPN. On the
2. Measurement is performed with a 2:1 balun (50 Ω input, 200 Ω balanced output) and includes matching network and
3. Specifications are guaranteed by characterization.
4. Wanted signal at balun input is –102 dBm. SNR at baseband output is 9 dB.
5. AGAIN[2:0]=min=000
6. AGAIN[2:0]=min=000
7. Voltage gain is defined as the differential rms voltage at the RXIP/RXIN pins or RXQP/RXQN pins divided by the rms
8. Voltage gain is defined as the differential rms voltage at the LNA output divided by the rms voltage at the balun output.
9. Output pins RXIP, RXIN, RXQP, RXQN.
10. The baseband signal path is entirely digital. Gain, phase, and offset errors at the baseband outputs are because of the
11. Group delay is measured from antenna input to baseband outputs. Differential group delay is measured in-band.
12. Includes settling time of the Si4133T frequency synthesizer. Settling to 5 degrees phase error measured at RXIP, RXIN,
= 2.7 to 3.0 V, T
Si4200DB, the PCS input pins should be used for either PCS 1900 or DCS 1800 bands.
PCB losses. Measured at max gain (AGAIN[2:0] =max=100
otherwise noted. Noise figure measurements are referred to 290 °K. Insertion loss of the balun is removed.
voltage at the balun input with DACFS[1:0] = 01 and CSEL = 1. Gain is 1.5 dB higher with CSEL = 0. Minimum and
maximum values do not include the variation in the Si4201 DAC full scale voltage (also see Maximum Differential
Output Voltage specification).
Si4201 D/A converters. Offsets can be measured and calibrated out. See ZERODEL[2:0] in the register description.
RXQP, and RXQN pins.
A
= –20 to 85 °C)
b
b
, LNAG[1:0] = max=01
, LNAG[1:0] = min=00
Symbol
b
b
, LNAC[1:0] = min=00
, LNAC[1:0] =max= 01
Rev. 1.4
Test Condition
b
, LNAG[1:0] = max=01
b
.
b
.
Min
b
, LNAC[1:0] = max=01
Typ
Max
b
) unless
Unit